1 //===--- TargetID.cpp - Utilities for parsing target ID -------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #include "clang/Basic/TargetID.h" 10 #include "llvm/ADT/SmallSet.h" 11 #include "llvm/ADT/Triple.h" 12 #include "llvm/Support/TargetParser.h" 13 #include "llvm/Support/raw_ostream.h" 14 #include <map> 15 16 namespace clang { 17 18 static llvm::SmallVector<llvm::StringRef, 4> 19 getAllPossibleAMDGPUTargetIDFeatures(const llvm::Triple &T, 20 llvm::StringRef Proc) { 21 // Entries in returned vector should be in alphabetical order. 22 llvm::SmallVector<llvm::StringRef, 4> Ret; 23 auto ProcKind = T.isAMDGCN() ? llvm::AMDGPU::parseArchAMDGCN(Proc) 24 : llvm::AMDGPU::parseArchR600(Proc); 25 if (ProcKind == llvm::AMDGPU::GK_NONE) 26 return Ret; 27 auto Features = T.isAMDGCN() ? llvm::AMDGPU::getArchAttrAMDGCN(ProcKind) 28 : llvm::AMDGPU::getArchAttrR600(ProcKind); 29 if (Features & llvm::AMDGPU::FEATURE_SRAMECC) 30 Ret.push_back("sramecc"); 31 if (Features & llvm::AMDGPU::FEATURE_XNACK) 32 Ret.push_back("xnack"); 33 return Ret; 34 } 35 36 llvm::SmallVector<llvm::StringRef, 4> 37 getAllPossibleTargetIDFeatures(const llvm::Triple &T, 38 llvm::StringRef Processor) { 39 llvm::SmallVector<llvm::StringRef, 4> Ret; 40 if (T.isAMDGPU()) 41 return getAllPossibleAMDGPUTargetIDFeatures(T, Processor); 42 return Ret; 43 } 44 45 /// Returns canonical processor name or empty string if \p Processor is invalid. 46 static llvm::StringRef getCanonicalProcessorName(const llvm::Triple &T, 47 llvm::StringRef Processor) { 48 if (T.isAMDGPU()) 49 return llvm::AMDGPU::getCanonicalArchName(T, Processor); 50 return Processor; 51 } 52 53 llvm::StringRef getProcessorFromTargetID(const llvm::Triple &T, 54 llvm::StringRef TargetID) { 55 auto Split = TargetID.split(':'); 56 return getCanonicalProcessorName(T, Split.first); 57 } 58 59 // Parse a target ID with format checking only. Do not check whether processor 60 // name or features are valid for the processor. 61 // 62 // A target ID is a processor name followed by a list of target features 63 // delimited by colon. Each target feature is a string post-fixed by a plus 64 // or minus sign, e.g. gfx908:sramecc+:xnack-. 65 static llvm::Optional<llvm::StringRef> 66 parseTargetIDWithFormatCheckingOnly(llvm::StringRef TargetID, 67 llvm::StringMap<bool> *FeatureMap) { 68 llvm::StringRef Processor; 69 70 if (TargetID.empty()) 71 return llvm::StringRef(); 72 73 auto Split = TargetID.split(':'); 74 Processor = Split.first; 75 if (Processor.empty()) 76 return llvm::None; 77 78 auto Features = Split.second; 79 if (Features.empty()) 80 return Processor; 81 82 llvm::StringMap<bool> LocalFeatureMap; 83 if (!FeatureMap) 84 FeatureMap = &LocalFeatureMap; 85 86 while (!Features.empty()) { 87 auto Splits = Features.split(':'); 88 auto Sign = Splits.first.back(); 89 auto Feature = Splits.first.drop_back(); 90 if (Sign != '+' && Sign != '-') 91 return llvm::None; 92 bool IsOn = Sign == '+'; 93 auto Loc = FeatureMap->find(Feature); 94 // Each feature can only show up at most once in target ID. 95 if (Loc != FeatureMap->end()) 96 return llvm::None; 97 (*FeatureMap)[Feature] = IsOn; 98 Features = Splits.second; 99 } 100 return Processor; 101 } 102 103 llvm::Optional<llvm::StringRef> 104 parseTargetID(const llvm::Triple &T, llvm::StringRef TargetID, 105 llvm::StringMap<bool> *FeatureMap) { 106 auto OptionalProcessor = 107 parseTargetIDWithFormatCheckingOnly(TargetID, FeatureMap); 108 109 if (!OptionalProcessor) 110 return llvm::None; 111 112 llvm::StringRef Processor = 113 getCanonicalProcessorName(T, OptionalProcessor.getValue()); 114 if (Processor.empty()) 115 return llvm::None; 116 117 llvm::SmallSet<llvm::StringRef, 4> AllFeatures; 118 for (auto &&F : getAllPossibleTargetIDFeatures(T, Processor)) 119 AllFeatures.insert(F); 120 121 for (auto &&F : *FeatureMap) 122 if (!AllFeatures.count(F.first())) 123 return llvm::None; 124 125 return Processor; 126 } 127 128 // A canonical target ID is a target ID containing a canonical processor name 129 // and features in alphabetical order. 130 std::string getCanonicalTargetID(llvm::StringRef Processor, 131 const llvm::StringMap<bool> &Features) { 132 std::string TargetID = Processor.str(); 133 std::map<const llvm::StringRef, bool> OrderedMap; 134 for (const auto &F : Features) 135 OrderedMap[F.first()] = F.second; 136 for (auto F : OrderedMap) 137 TargetID = TargetID + ':' + F.first.str() + (F.second ? "+" : "-"); 138 return TargetID; 139 } 140 141 // For a specific processor, a feature either shows up in all target IDs, or 142 // does not show up in any target IDs. Otherwise the target ID combination 143 // is invalid. 144 llvm::Optional<std::pair<llvm::StringRef, llvm::StringRef>> 145 getConflictTargetIDCombination(const std::set<llvm::StringRef> &TargetIDs) { 146 struct Info { 147 llvm::StringRef TargetID; 148 llvm::StringMap<bool> Features; 149 }; 150 llvm::StringMap<Info> FeatureMap; 151 for (auto &&ID : TargetIDs) { 152 llvm::StringMap<bool> Features; 153 llvm::StringRef Proc = 154 parseTargetIDWithFormatCheckingOnly(ID, &Features).getValue(); 155 auto Loc = FeatureMap.find(Proc); 156 if (Loc == FeatureMap.end()) 157 FeatureMap[Proc] = Info{ID, Features}; 158 else { 159 auto &ExistingFeatures = Loc->second.Features; 160 if (llvm::any_of(Features, [&](auto &F) { 161 return ExistingFeatures.count(F.first()) == 0; 162 })) 163 return std::make_pair(Loc->second.TargetID, ID); 164 } 165 } 166 return llvm::None; 167 } 168 169 } // namespace clang 170