1 /* 2 * Double-precision vector log2 function. 3 * 4 * Copyright (c) 2022-2023, Arm Limited. 5 * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception 6 */ 7 8 #include "v_math.h" 9 #include "pl_sig.h" 10 #include "pl_test.h" 11 #include "poly_advsimd_f64.h" 12 13 #define N (1 << V_LOG2_TABLE_BITS) 14 15 static const struct data 16 { 17 uint64x2_t min_norm; 18 uint32x4_t special_bound; 19 float64x2_t poly[5]; 20 float64x2_t invln2; 21 uint64x2_t sign_exp_mask; 22 } data = { 23 /* Each coefficient was generated to approximate log(r) for |r| < 0x1.fp-9 24 and N = 128, then scaled by log2(e) in extended precision and rounded back 25 to double precision. */ 26 .poly = { V2 (-0x1.71547652b83p-1), V2 (0x1.ec709dc340953p-2), 27 V2 (-0x1.71547651c8f35p-2), V2 (0x1.2777ebe12dda5p-2), 28 V2 (-0x1.ec738d616fe26p-3) }, 29 .invln2 = V2 (0x1.71547652b82fep0), 30 .min_norm = V2 (0x0010000000000000), /* asuint64(0x1p-1022). */ 31 .special_bound = V4 (0x7fe00000), /* asuint64(inf) - min_norm. */ 32 .sign_exp_mask = V2 (0xfff0000000000000), 33 }; 34 35 #define Off v_u64 (0x3fe6900900000000) 36 #define IndexMask (N - 1) 37 38 struct entry 39 { 40 float64x2_t invc; 41 float64x2_t log2c; 42 }; 43 44 static inline struct entry 45 lookup (uint64x2_t i) 46 { 47 struct entry e; 48 uint64_t i0 = (i[0] >> (52 - V_LOG2_TABLE_BITS)) & IndexMask; 49 uint64_t i1 = (i[1] >> (52 - V_LOG2_TABLE_BITS)) & IndexMask; 50 float64x2_t e0 = vld1q_f64 (&__v_log2_data.table[i0].invc); 51 float64x2_t e1 = vld1q_f64 (&__v_log2_data.table[i1].invc); 52 e.invc = vuzp1q_f64 (e0, e1); 53 e.log2c = vuzp2q_f64 (e0, e1); 54 return e; 55 } 56 57 static float64x2_t VPCS_ATTR NOINLINE 58 special_case (float64x2_t x, float64x2_t y, float64x2_t w, float64x2_t r2, 59 uint32x2_t special) 60 { 61 return v_call_f64 (log2, x, vfmaq_f64 (w, r2, y), vmovl_u32 (special)); 62 } 63 64 /* Double-precision vector log2 routine. Implements the same algorithm as 65 vector log10, with coefficients and table entries scaled in extended 66 precision. The maximum observed error is 2.58 ULP: 67 _ZGVnN2v_log2(0x1.0b556b093869bp+0) got 0x1.fffb34198d9dap-5 68 want 0x1.fffb34198d9ddp-5. */ 69 float64x2_t VPCS_ATTR V_NAME_D1 (log2) (float64x2_t x) 70 { 71 const struct data *d = ptr_barrier (&data); 72 uint64x2_t ix = vreinterpretq_u64_f64 (x); 73 uint32x2_t special = vcge_u32 (vsubhn_u64 (ix, d->min_norm), 74 vget_low_u32 (d->special_bound)); 75 76 /* x = 2^k z; where z is in range [Off,2*Off) and exact. 77 The range is split into N subintervals. 78 The ith subinterval contains z and c is near its center. */ 79 uint64x2_t tmp = vsubq_u64 (ix, Off); 80 int64x2_t k = vshrq_n_s64 (vreinterpretq_s64_u64 (tmp), 52); 81 uint64x2_t iz = vsubq_u64 (ix, vandq_u64 (tmp, d->sign_exp_mask)); 82 float64x2_t z = vreinterpretq_f64_u64 (iz); 83 84 struct entry e = lookup (tmp); 85 86 /* log2(x) = log1p(z/c-1)/log(2) + log2(c) + k. */ 87 88 float64x2_t r = vfmaq_f64 (v_f64 (-1.0), z, e.invc); 89 float64x2_t kd = vcvtq_f64_s64 (k); 90 float64x2_t w = vfmaq_f64 (e.log2c, r, d->invln2); 91 92 float64x2_t r2 = vmulq_f64 (r, r); 93 float64x2_t y = v_pw_horner_4_f64 (r, r2, d->poly); 94 w = vaddq_f64 (kd, w); 95 96 if (unlikely (v_any_u32h (special))) 97 return special_case (x, y, w, r2, special); 98 return vfmaq_f64 (w, r2, y); 99 } 100 101 PL_SIG (V, D, 1, log2, 0.01, 11.1) 102 PL_TEST_ULP (V_NAME_D1 (log2), 2.09) 103 PL_TEST_EXPECT_FENV_ALWAYS (V_NAME_D1 (log2)) 104 PL_TEST_INTERVAL (V_NAME_D1 (log2), -0.0, -0x1p126, 100) 105 PL_TEST_INTERVAL (V_NAME_D1 (log2), 0x1p-149, 0x1p-126, 4000) 106 PL_TEST_INTERVAL (V_NAME_D1 (log2), 0x1p-126, 0x1p-23, 50000) 107 PL_TEST_INTERVAL (V_NAME_D1 (log2), 0x1p-23, 1.0, 50000) 108 PL_TEST_INTERVAL (V_NAME_D1 (log2), 1.0, 100, 50000) 109 PL_TEST_INTERVAL (V_NAME_D1 (log2), 100, inf, 50000) 110