1 /* 2 * Double-precision vector exp(x) - 1 function. 3 * 4 * Copyright (c) 2022-2023, Arm Limited. 5 * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception 6 */ 7 8 #include "v_math.h" 9 #include "poly_advsimd_f64.h" 10 #include "pl_sig.h" 11 #include "pl_test.h" 12 13 static const struct data 14 { 15 float64x2_t poly[11]; 16 float64x2_t invln2, ln2, shift; 17 int64x2_t exponent_bias; 18 #if WANT_SIMD_EXCEPT 19 uint64x2_t thresh, tiny_bound; 20 #else 21 float64x2_t oflow_bound; 22 #endif 23 } data = { 24 /* Generated using fpminimax, with degree=12 in [log(2)/2, log(2)/2]. */ 25 .poly = { V2 (0x1p-1), V2 (0x1.5555555555559p-3), V2 (0x1.555555555554bp-5), 26 V2 (0x1.111111110f663p-7), V2 (0x1.6c16c16c1b5f3p-10), 27 V2 (0x1.a01a01affa35dp-13), V2 (0x1.a01a018b4ecbbp-16), 28 V2 (0x1.71ddf82db5bb4p-19), V2 (0x1.27e517fc0d54bp-22), 29 V2 (0x1.af5eedae67435p-26), V2 (0x1.1f143d060a28ap-29) }, 30 .invln2 = V2 (0x1.71547652b82fep0), 31 .ln2 = { 0x1.62e42fefa39efp-1, 0x1.abc9e3b39803fp-56 }, 32 .shift = V2 (0x1.8p52), 33 .exponent_bias = V2 (0x3ff0000000000000), 34 #if WANT_SIMD_EXCEPT 35 /* asuint64(oflow_bound) - asuint64(0x1p-51), shifted left by 1 for abs 36 compare. */ 37 .thresh = V2 (0x78c56fa6d34b552), 38 /* asuint64(0x1p-51) << 1. */ 39 .tiny_bound = V2 (0x3cc0000000000000 << 1), 40 #else 41 /* Value above which expm1(x) should overflow. Absolute value of the 42 underflow bound is greater than this, so it catches both cases - there is 43 a small window where fallbacks are triggered unnecessarily. */ 44 .oflow_bound = V2 (0x1.62b7d369a5aa9p+9), 45 #endif 46 }; 47 48 static float64x2_t VPCS_ATTR NOINLINE 49 special_case (float64x2_t x, float64x2_t y, uint64x2_t special) 50 { 51 return v_call_f64 (expm1, x, y, special); 52 } 53 54 /* Double-precision vector exp(x) - 1 function. 55 The maximum error observed error is 2.18 ULP: 56 _ZGVnN2v_expm1 (0x1.634ba0c237d7bp-2) got 0x1.a8b9ea8d66e22p-2 57 want 0x1.a8b9ea8d66e2p-2. */ 58 float64x2_t VPCS_ATTR V_NAME_D1 (expm1) (float64x2_t x) 59 { 60 const struct data *d = ptr_barrier (&data); 61 62 uint64x2_t ix = vreinterpretq_u64_f64 (x); 63 64 #if WANT_SIMD_EXCEPT 65 /* If fp exceptions are to be triggered correctly, fall back to scalar for 66 |x| < 2^-51, |x| > oflow_bound, Inf & NaN. Add ix to itself for 67 shift-left by 1, and compare with thresh which was left-shifted offline - 68 this is effectively an absolute compare. */ 69 uint64x2_t special 70 = vcgeq_u64 (vsubq_u64 (vaddq_u64 (ix, ix), d->tiny_bound), d->thresh); 71 if (unlikely (v_any_u64 (special))) 72 x = v_zerofy_f64 (x, special); 73 #else 74 /* Large input, NaNs and Infs. */ 75 uint64x2_t special = vcageq_f64 (x, d->oflow_bound); 76 #endif 77 78 /* Reduce argument to smaller range: 79 Let i = round(x / ln2) 80 and f = x - i * ln2, then f is in [-ln2/2, ln2/2]. 81 exp(x) - 1 = 2^i * (expm1(f) + 1) - 1 82 where 2^i is exact because i is an integer. */ 83 float64x2_t n = vsubq_f64 (vfmaq_f64 (d->shift, d->invln2, x), d->shift); 84 int64x2_t i = vcvtq_s64_f64 (n); 85 float64x2_t f = vfmsq_laneq_f64 (x, n, d->ln2, 0); 86 f = vfmsq_laneq_f64 (f, n, d->ln2, 1); 87 88 /* Approximate expm1(f) using polynomial. 89 Taylor expansion for expm1(x) has the form: 90 x + ax^2 + bx^3 + cx^4 .... 91 So we calculate the polynomial P(f) = a + bf + cf^2 + ... 92 and assemble the approximation expm1(f) ~= f + f^2 * P(f). */ 93 float64x2_t f2 = vmulq_f64 (f, f); 94 float64x2_t f4 = vmulq_f64 (f2, f2); 95 float64x2_t f8 = vmulq_f64 (f4, f4); 96 float64x2_t p = vfmaq_f64 (f, f2, v_estrin_10_f64 (f, f2, f4, f8, d->poly)); 97 98 /* Assemble the result. 99 expm1(x) ~= 2^i * (p + 1) - 1 100 Let t = 2^i. */ 101 int64x2_t u = vaddq_s64 (vshlq_n_s64 (i, 52), d->exponent_bias); 102 float64x2_t t = vreinterpretq_f64_s64 (u); 103 104 if (unlikely (v_any_u64 (special))) 105 return special_case (vreinterpretq_f64_u64 (ix), 106 vfmaq_f64 (vsubq_f64 (t, v_f64 (1.0)), p, t), 107 special); 108 109 /* expm1(x) ~= p * t + (t - 1). */ 110 return vfmaq_f64 (vsubq_f64 (t, v_f64 (1.0)), p, t); 111 } 112 113 PL_SIG (V, D, 1, expm1, -9.9, 9.9) 114 PL_TEST_ULP (V_NAME_D1 (expm1), 1.68) 115 PL_TEST_EXPECT_FENV (V_NAME_D1 (expm1), WANT_SIMD_EXCEPT) 116 PL_TEST_SYM_INTERVAL (V_NAME_D1 (expm1), 0, 0x1p-51, 1000) 117 PL_TEST_SYM_INTERVAL (V_NAME_D1 (expm1), 0x1p-51, 0x1.62b7d369a5aa9p+9, 100000) 118 PL_TEST_SYM_INTERVAL (V_NAME_D1 (expm1), 0x1.62b7d369a5aa9p+9, inf, 100) 119