1072a4ba8SAndrew Turner /*
2072a4ba8SAndrew Turner * Single-precision vector acosh(x) function.
3072a4ba8SAndrew Turner * Copyright (c) 2023, Arm Limited.
4072a4ba8SAndrew Turner * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception
5072a4ba8SAndrew Turner */
6072a4ba8SAndrew Turner
7072a4ba8SAndrew Turner #include "v_math.h"
8072a4ba8SAndrew Turner #include "pl_sig.h"
9072a4ba8SAndrew Turner #include "pl_test.h"
10072a4ba8SAndrew Turner #include "v_log1pf_inline.h"
11072a4ba8SAndrew Turner
12*5a02ffc3SAndrew Turner const static struct data
13072a4ba8SAndrew Turner {
14*5a02ffc3SAndrew Turner struct v_log1pf_data log1pf_consts;
15*5a02ffc3SAndrew Turner uint32x4_t one;
16*5a02ffc3SAndrew Turner uint16x4_t thresh;
17*5a02ffc3SAndrew Turner } data = {
18*5a02ffc3SAndrew Turner .log1pf_consts = V_LOG1PF_CONSTANTS_TABLE,
19*5a02ffc3SAndrew Turner .one = V4 (0x3f800000),
20*5a02ffc3SAndrew Turner .thresh = V4 (0x2000) /* asuint(0x1p64) - asuint(1). */
21*5a02ffc3SAndrew Turner };
22*5a02ffc3SAndrew Turner
23*5a02ffc3SAndrew Turner #define SignMask 0x80000000
24*5a02ffc3SAndrew Turner
25*5a02ffc3SAndrew Turner static float32x4_t NOINLINE VPCS_ATTR
special_case(float32x4_t x,float32x4_t y,uint16x4_t special,const struct v_log1pf_data d)26*5a02ffc3SAndrew Turner special_case (float32x4_t x, float32x4_t y, uint16x4_t special,
27*5a02ffc3SAndrew Turner const struct v_log1pf_data d)
28*5a02ffc3SAndrew Turner {
29*5a02ffc3SAndrew Turner return v_call_f32 (acoshf, x, log1pf_inline (y, d), vmovl_u16 (special));
30072a4ba8SAndrew Turner }
31072a4ba8SAndrew Turner
32072a4ba8SAndrew Turner /* Vector approximation for single-precision acosh, based on log1p. Maximum
33072a4ba8SAndrew Turner error depends on WANT_SIMD_EXCEPT. With SIMD fp exceptions enabled, it
34072a4ba8SAndrew Turner is 2.78 ULP:
35072a4ba8SAndrew Turner __v_acoshf(0x1.07887p+0) got 0x1.ef9e9cp-3
36072a4ba8SAndrew Turner want 0x1.ef9ea2p-3.
37072a4ba8SAndrew Turner With exceptions disabled, we can compute u with a shorter dependency chain,
38072a4ba8SAndrew Turner which gives maximum error of 3.07 ULP:
39072a4ba8SAndrew Turner __v_acoshf(0x1.01f83ep+0) got 0x1.fbc7fap-4
40072a4ba8SAndrew Turner want 0x1.fbc7f4p-4. */
41072a4ba8SAndrew Turner
V_NAME_F1(acosh)42*5a02ffc3SAndrew Turner VPCS_ATTR float32x4_t V_NAME_F1 (acosh) (float32x4_t x)
43072a4ba8SAndrew Turner {
44*5a02ffc3SAndrew Turner const struct data *d = ptr_barrier (&data);
45*5a02ffc3SAndrew Turner uint32x4_t ix = vreinterpretq_u32_f32 (x);
46*5a02ffc3SAndrew Turner uint16x4_t special = vcge_u16 (vsubhn_u32 (ix, d->one), d->thresh);
47072a4ba8SAndrew Turner
48072a4ba8SAndrew Turner #if WANT_SIMD_EXCEPT
49072a4ba8SAndrew Turner /* Mask special lanes with 1 to side-step spurious invalid or overflow. Use
50*5a02ffc3SAndrew Turner only xm1 to calculate u, as operating on x will trigger invalid for NaN.
51*5a02ffc3SAndrew Turner Widening sign-extend special predicate in order to mask with it. */
52*5a02ffc3SAndrew Turner uint32x4_t p
53*5a02ffc3SAndrew Turner = vreinterpretq_u32_s32 (vmovl_s16 (vreinterpret_s16_u16 (special)));
54*5a02ffc3SAndrew Turner float32x4_t xm1 = v_zerofy_f32 (vsubq_f32 (x, v_f32 (1)), p);
55*5a02ffc3SAndrew Turner float32x4_t u = vfmaq_f32 (vaddq_f32 (xm1, xm1), xm1, xm1);
56072a4ba8SAndrew Turner #else
57*5a02ffc3SAndrew Turner float32x4_t xm1 = vsubq_f32 (x, v_f32 (1));
58*5a02ffc3SAndrew Turner float32x4_t u = vmulq_f32 (xm1, vaddq_f32 (x, v_f32 (1.0f)));
59072a4ba8SAndrew Turner #endif
60072a4ba8SAndrew Turner
61*5a02ffc3SAndrew Turner float32x4_t y = vaddq_f32 (xm1, vsqrtq_f32 (u));
62*5a02ffc3SAndrew Turner
63*5a02ffc3SAndrew Turner if (unlikely (v_any_u16h (special)))
64*5a02ffc3SAndrew Turner return special_case (x, y, special, d->log1pf_consts);
65*5a02ffc3SAndrew Turner return log1pf_inline (y, d->log1pf_consts);
66072a4ba8SAndrew Turner }
67072a4ba8SAndrew Turner
68072a4ba8SAndrew Turner PL_SIG (V, F, 1, acosh, 1.0, 10.0)
69072a4ba8SAndrew Turner #if WANT_SIMD_EXCEPT
70*5a02ffc3SAndrew Turner PL_TEST_ULP (V_NAME_F1 (acosh), 2.29)
71072a4ba8SAndrew Turner #else
72*5a02ffc3SAndrew Turner PL_TEST_ULP (V_NAME_F1 (acosh), 2.58)
73072a4ba8SAndrew Turner #endif
74*5a02ffc3SAndrew Turner PL_TEST_EXPECT_FENV (V_NAME_F1 (acosh), WANT_SIMD_EXCEPT)
75*5a02ffc3SAndrew Turner PL_TEST_INTERVAL (V_NAME_F1 (acosh), 0, 1, 500)
76*5a02ffc3SAndrew Turner PL_TEST_INTERVAL (V_NAME_F1 (acosh), 1, SquareLim, 100000)
77*5a02ffc3SAndrew Turner PL_TEST_INTERVAL (V_NAME_F1 (acosh), SquareLim, inf, 1000)
78*5a02ffc3SAndrew Turner PL_TEST_INTERVAL (V_NAME_F1 (acosh), -0, -inf, 1000)
79