xref: /freebsd/contrib/arm-optimized-routines/pl/math/sv_sinf_1u9.c (revision 7ef62cebc2f965b0f640263e179276928885e33d)
1 /*
2  * Single-precision SVE sin(x) function.
3  *
4  * Copyright (c) 2019-2023, Arm Limited.
5  * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception
6  */
7 
8 #include "sv_math.h"
9 #include "pl_sig.h"
10 #include "pl_test.h"
11 
12 #if SV_SUPPORTED
13 
14 #define A3 (sv_f32 (__sv_sinf_data.coeffs[3]))
15 #define A5 (sv_f32 (__sv_sinf_data.coeffs[2]))
16 #define A7 (sv_f32 (__sv_sinf_data.coeffs[1]))
17 #define A9 (sv_f32 (__sv_sinf_data.coeffs[0]))
18 
19 #define NegPi1 (sv_f32 (-0x1.921fb6p+1f))
20 #define NegPi2 (sv_f32 (0x1.777a5cp-24f))
21 #define NegPi3 (sv_f32 (0x1.ee59dap-49f))
22 #define RangeVal (sv_f32 (0x1p20f))
23 #define InvPi (sv_f32 (0x1.45f306p-2f))
24 #define Shift (sv_f32 (0x1.8p+23f))
25 #define AbsMask (0x7fffffff)
26 
27 static NOINLINE sv_f32_t
28 __sv_sinf_specialcase (sv_f32_t x, sv_f32_t y, svbool_t cmp)
29 {
30   return sv_call_f32 (sinf, x, y, cmp);
31 }
32 
33 /* A fast SVE implementation of sinf.
34    Maximum error: 1.89 ULPs.
35    This maximum error is achieved at multiple values in [-2^18, 2^18]
36    but one example is:
37    __sv_sinf(0x1.9247a4p+0) got 0x1.fffff6p-1 want 0x1.fffffap-1.  */
38 sv_f32_t
39 __sv_sinf_x (sv_f32_t x, const svbool_t pg)
40 {
41   sv_f32_t n, r, r2, y;
42   sv_u32_t sign, odd;
43   svbool_t cmp;
44 
45   r = sv_as_f32_u32 (svand_n_u32_x (pg, sv_as_u32_f32 (x), AbsMask));
46   sign = svand_n_u32_x (pg, sv_as_u32_f32 (x), ~AbsMask);
47   cmp = svcmpge_u32 (pg, sv_as_u32_f32 (r), sv_as_u32_f32 (RangeVal));
48 
49   /* n = rint(|x|/pi).  */
50   n = sv_fma_f32_x (pg, InvPi, r, Shift);
51   odd = svlsl_n_u32_x (pg, sv_as_u32_f32 (n), 31);
52   n = svsub_f32_x (pg, n, Shift);
53 
54   /* r = |x| - n*pi  (range reduction into -pi/2 .. pi/2).  */
55   r = sv_fma_f32_x (pg, NegPi1, n, r);
56   r = sv_fma_f32_x (pg, NegPi2, n, r);
57   r = sv_fma_f32_x (pg, NegPi3, n, r);
58 
59   /* sin(r) approx using a degree 9 polynomial from the Taylor series
60      expansion. Note that only the odd terms of this are non-zero.  */
61   r2 = svmul_f32_x (pg, r, r);
62   y = sv_fma_f32_x (pg, A9, r2, A7);
63   y = sv_fma_f32_x (pg, y, r2, A5);
64   y = sv_fma_f32_x (pg, y, r2, A3);
65   y = sv_fma_f32_x (pg, svmul_f32_x (pg, y, r2), r, r);
66 
67   /* sign = y^sign^odd.  */
68   y = sv_as_f32_u32 (
69     sveor_u32_x (pg, sv_as_u32_f32 (y), sveor_u32_x (pg, sign, odd)));
70 
71   /* No need to pass pg to specialcase here since cmp is a strict subset,
72      guaranteed by the cmpge above.  */
73   if (unlikely (svptest_any (pg, cmp)))
74     return __sv_sinf_specialcase (x, y, cmp);
75   return y;
76 }
77 
78 PL_ALIAS (__sv_sinf_x, _ZGVsMxv_sinf)
79 
80 PL_SIG (SV, F, 1, sin, -3.1, 3.1)
81 PL_TEST_ULP (__sv_sinf, 1.40)
82 PL_TEST_INTERVAL (__sv_sinf, 0, 0xffff0000, 10000)
83 PL_TEST_INTERVAL (__sv_sinf, 0x1p-4, 0x1p4, 500000)
84 #endif
85