1 /* 2 * Double-precision SVE log2 function. 3 * 4 * Copyright (c) 2022-2023, Arm Limited. 5 * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception 6 */ 7 8 #include "sv_math.h" 9 #include "pl_sig.h" 10 #include "pl_test.h" 11 12 #if SV_SUPPORTED 13 14 #define InvLn2 sv_f64 (0x1.71547652b82fep0) 15 #define N (1 << V_LOG2_TABLE_BITS) 16 #define OFF 0x3fe6900900000000 17 #define P(i) sv_f64 (__v_log2_data.poly[i]) 18 19 NOINLINE static sv_f64_t 20 specialcase (sv_f64_t x, sv_f64_t y, const svbool_t cmp) 21 { 22 return sv_call_f64 (log2, x, y, cmp); 23 } 24 25 /* Double-precision SVE log2 routine. Implements the same algorithm as vector 26 log10, with coefficients and table entries scaled in extended precision. 27 The maximum observed error is 2.58 ULP: 28 __v_log2(0x1.0b556b093869bp+0) got 0x1.fffb34198d9dap-5 29 want 0x1.fffb34198d9ddp-5. */ 30 sv_f64_t 31 __sv_log2_x (sv_f64_t x, const svbool_t pg) 32 { 33 sv_u64_t ix = sv_as_u64_f64 (x); 34 sv_u64_t top = svlsr_n_u64_x (pg, ix, 48); 35 36 svbool_t special 37 = svcmpge_n_u64 (pg, svsub_n_u64_x (pg, top, 0x0010), 0x7ff0 - 0x0010); 38 39 /* x = 2^k z; where z is in range [OFF,2*OFF) and exact. 40 The range is split into N subintervals. 41 The ith subinterval contains z and c is near its center. */ 42 sv_u64_t tmp = svsub_n_u64_x (pg, ix, OFF); 43 sv_u64_t i 44 = sv_mod_n_u64_x (pg, svlsr_n_u64_x (pg, tmp, 52 - V_LOG2_TABLE_BITS), N); 45 sv_f64_t k 46 = sv_to_f64_s64_x (pg, svasr_n_s64_x (pg, sv_as_s64_u64 (tmp), 52)); 47 sv_f64_t z = sv_as_f64_u64 ( 48 svsub_u64_x (pg, ix, svand_n_u64_x (pg, tmp, 0xfffULL << 52))); 49 50 sv_u64_t idx = svmul_n_u64_x (pg, i, 2); 51 sv_f64_t invc = sv_lookup_f64_x (pg, &__v_log2_data.tab[0].invc, idx); 52 sv_f64_t log2c = sv_lookup_f64_x (pg, &__v_log2_data.tab[0].log2c, idx); 53 54 /* log2(x) = log1p(z/c-1)/log(2) + log2(c) + k. */ 55 56 sv_f64_t r = sv_fma_f64_x (pg, z, invc, sv_f64 (-1.0)); 57 sv_f64_t w = sv_fma_f64_x (pg, r, InvLn2, log2c); 58 59 sv_f64_t r2 = svmul_f64_x (pg, r, r); 60 sv_f64_t p_23 = sv_fma_f64_x (pg, P (3), r, P (2)); 61 sv_f64_t p_01 = sv_fma_f64_x (pg, P (1), r, P (0)); 62 sv_f64_t y = sv_fma_f64_x (pg, P (4), r2, p_23); 63 y = sv_fma_f64_x (pg, y, r2, p_01); 64 y = sv_fma_f64_x (pg, y, r2, svadd_f64_x (pg, k, w)); 65 66 if (unlikely (svptest_any (pg, special))) 67 { 68 return specialcase (x, y, special); 69 } 70 return y; 71 } 72 73 PL_ALIAS (__sv_log2_x, _ZGVsMxv_log2) 74 75 PL_SIG (SV, D, 1, log2, 0.01, 11.1) 76 PL_TEST_ULP (__sv_log2, 2.09) 77 PL_TEST_EXPECT_FENV_ALWAYS (__sv_log2) 78 PL_TEST_INTERVAL (__sv_log2, -0.0, -0x1p126, 1000) 79 PL_TEST_INTERVAL (__sv_log2, 0.0, 0x1p-126, 4000) 80 PL_TEST_INTERVAL (__sv_log2, 0x1p-126, 0x1p-23, 50000) 81 PL_TEST_INTERVAL (__sv_log2, 0x1p-23, 1.0, 50000) 82 PL_TEST_INTERVAL (__sv_log2, 1.0, 100, 50000) 83 PL_TEST_INTERVAL (__sv_log2, 100, inf, 50000) 84 85 #endif 86