xref: /freebsd/contrib/arm-optimized-routines/math/aarch64/v_log.c (revision f126890ac5386406dadf7c4cfa9566cbb56537c5)
1 /*
2  * Double-precision vector log(x) function.
3  *
4  * Copyright (c) 2019-2023, Arm Limited.
5  * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception
6  */
7 
8 #include "mathlib.h"
9 #include "v_math.h"
10 
11 static const struct data
12 {
13   uint64x2_t min_norm;
14   uint32x4_t special_bound;
15   float64x2_t poly[5];
16   float64x2_t ln2;
17   uint64x2_t sign_exp_mask;
18 } data = {
19   /* Worst-case error: 1.17 + 0.5 ulp.
20      Rel error: 0x1.6272e588p-56 in [ -0x1.fc1p-9 0x1.009p-8 ].  */
21   .poly = { V2 (-0x1.ffffffffffff7p-2), V2 (0x1.55555555170d4p-2),
22 	    V2 (-0x1.0000000399c27p-2), V2 (0x1.999b2e90e94cap-3),
23 	    V2 (-0x1.554e550bd501ep-3) },
24   .ln2 = V2 (0x1.62e42fefa39efp-1),
25   .min_norm = V2 (0x0010000000000000),
26   .special_bound = V4 (0x7fe00000), /* asuint64(inf) - min_norm.  */
27   .sign_exp_mask = V2 (0xfff0000000000000)
28 };
29 
30 #define A(i) d->poly[i]
31 #define N (1 << V_LOG_TABLE_BITS)
32 #define IndexMask (N - 1)
33 #define Off v_u64 (0x3fe6900900000000)
34 
35 struct entry
36 {
37   float64x2_t invc;
38   float64x2_t logc;
39 };
40 
41 static inline struct entry
42 lookup (uint64x2_t i)
43 {
44   /* Since N is a power of 2, n % N = n & (N - 1).  */
45   struct entry e;
46   uint64_t i0 = (i[0] >> (52 - V_LOG_TABLE_BITS)) & IndexMask;
47   uint64_t i1 = (i[1] >> (52 - V_LOG_TABLE_BITS)) & IndexMask;
48   float64x2_t e0 = vld1q_f64 (&__v_log_data.table[i0].invc);
49   float64x2_t e1 = vld1q_f64 (&__v_log_data.table[i1].invc);
50   e.invc = vuzp1q_f64 (e0, e1);
51   e.logc = vuzp2q_f64 (e0, e1);
52   return e;
53 }
54 
55 static float64x2_t VPCS_ATTR NOINLINE
56 special_case (float64x2_t x, float64x2_t y, float64x2_t hi, float64x2_t r2,
57 	      uint32x2_t cmp)
58 {
59   return v_call_f64 (log, x, vfmaq_f64 (hi, y, r2), vmovl_u32 (cmp));
60 }
61 
62 float64x2_t VPCS_ATTR V_NAME_D1 (log) (float64x2_t x)
63 {
64   const struct data *d = ptr_barrier (&data);
65   float64x2_t z, r, r2, p, y, kd, hi;
66   uint64x2_t ix, iz, tmp;
67   uint32x2_t cmp;
68   int64x2_t k;
69   struct entry e;
70 
71   ix = vreinterpretq_u64_f64 (x);
72   cmp = vcge_u32 (vsubhn_u64 (ix, d->min_norm),
73 		  vget_low_u32 (d->special_bound));
74 
75   /* x = 2^k z; where z is in range [Off,2*Off) and exact.
76      The range is split into N subintervals.
77      The ith subinterval contains z and c is near its center.  */
78   tmp = vsubq_u64 (ix, Off);
79   k = vshrq_n_s64 (vreinterpretq_s64_u64 (tmp), 52); /* arithmetic shift.  */
80   iz = vsubq_u64 (ix, vandq_u64 (tmp, d->sign_exp_mask));
81   z = vreinterpretq_f64_u64 (iz);
82   e = lookup (tmp);
83 
84   /* log(x) = log1p(z/c-1) + log(c) + k*Ln2.  */
85   r = vfmaq_f64 (v_f64 (-1.0), z, e.invc);
86   kd = vcvtq_f64_s64 (k);
87 
88   /* hi = r + log(c) + k*Ln2.  */
89   hi = vfmaq_f64 (vaddq_f64 (e.logc, r), kd, d->ln2);
90   /* y = r2*(A0 + r*A1 + r2*(A2 + r*A3 + r2*A4)) + hi.  */
91   r2 = vmulq_f64 (r, r);
92   y = vfmaq_f64 (A (2), A (3), r);
93   p = vfmaq_f64 (A (0), A (1), r);
94   y = vfmaq_f64 (y, A (4), r2);
95   y = vfmaq_f64 (p, y, r2);
96 
97   if (unlikely (v_any_u32h (cmp)))
98     return special_case (x, y, hi, r2, cmp);
99   return vfmaq_f64 (hi, y, r2);
100 }
101