1 /* 2 * Single-precision SVE log10 function. 3 * 4 * Copyright (c) 2022-2024, Arm Limited. 5 * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception 6 */ 7 8 #include "sv_math.h" 9 #include "test_sig.h" 10 #include "test_defs.h" 11 12 static const struct data 13 { 14 float poly_0246[4]; 15 float poly_1357[4]; 16 float ln2, inv_ln10; 17 uint32_t off, lower; 18 } data = { 19 .poly_1357 = { 20 /* Coefficients copied from the AdvSIMD routine, then rearranged so that coeffs 21 1, 3, 5 and 7 can be loaded as a single quad-word, hence used with _lane 22 variant of MLA intrinsic. */ 23 0x1.2879c8p-3f, 0x1.6408f8p-4f, 0x1.f0e514p-5f, 0x1.f5f76ap-5f 24 }, 25 .poly_0246 = { -0x1.bcb79cp-3f, -0x1.bcd472p-4f, -0x1.246f8p-4f, 26 -0x1.0fc92cp-4f }, 27 .ln2 = 0x1.62e43p-1f, 28 .inv_ln10 = 0x1.bcb7b2p-2f, 29 .off = 0x3f2aaaab, 30 /* Lower bound is the smallest positive normal float 0x00800000. For 31 optimised register use subnormals are detected after offset has been 32 subtracted, so lower bound is 0x0080000 - offset (which wraps around). */ 33 .lower = 0x00800000 - 0x3f2aaaab 34 }; 35 36 #define Thres 0x7f000000 /* asuint32(inf) - 0x00800000. */ 37 #define MantissaMask 0x007fffff 38 39 static svfloat32_t NOINLINE 40 special_case (svuint32_t u_off, svfloat32_t p, svfloat32_t r2, svfloat32_t y, 41 svbool_t cmp) 42 { 43 return sv_call_f32 ( 44 log10f, svreinterpret_f32 (svadd_x (svptrue_b32 (), u_off, data.off)), 45 svmla_x (svptrue_b32 (), p, r2, y), cmp); 46 } 47 48 /* Optimised implementation of SVE log10f using the same algorithm and 49 polynomial as AdvSIMD log10f. 50 Maximum error is 3.31ulps: 51 SV_NAME_F1 (log10)(0x1.555c16p+0) got 0x1.ffe2fap-4 52 want 0x1.ffe2f4p-4. */ 53 svfloat32_t SV_NAME_F1 (log10) (svfloat32_t x, const svbool_t pg) 54 { 55 const struct data *d = ptr_barrier (&data); 56 57 svuint32_t u_off = svreinterpret_u32 (x); 58 59 u_off = svsub_x (pg, u_off, d->off); 60 svbool_t special = svcmpge (pg, svsub_x (pg, u_off, d->lower), Thres); 61 62 /* x = 2^n * (1+r), where 2/3 < 1+r < 4/3. */ 63 svfloat32_t n = svcvt_f32_x ( 64 pg, svasr_x (pg, svreinterpret_s32 (u_off), 23)); /* signextend. */ 65 svuint32_t ix = svand_x (pg, u_off, MantissaMask); 66 ix = svadd_x (pg, ix, d->off); 67 svfloat32_t r = svsub_x (pg, svreinterpret_f32 (ix), 1.0f); 68 69 /* y = log10(1+r) + n*log10(2) 70 log10(1+r) ~ r * InvLn(10) + P(r) 71 where P(r) is a polynomial. Use order 9 for log10(1+x), i.e. order 8 for 72 log10(1+x)/x, with x in [-1/3, 1/3] (offset=2/3). */ 73 svfloat32_t r2 = svmul_x (svptrue_b32 (), r, r); 74 svfloat32_t r4 = svmul_x (svptrue_b32 (), r2, r2); 75 svfloat32_t p_1357 = svld1rq (svptrue_b32 (), &d->poly_1357[0]); 76 svfloat32_t q_01 = svmla_lane (sv_f32 (d->poly_0246[0]), r, p_1357, 0); 77 svfloat32_t q_23 = svmla_lane (sv_f32 (d->poly_0246[1]), r, p_1357, 1); 78 svfloat32_t q_45 = svmla_lane (sv_f32 (d->poly_0246[2]), r, p_1357, 2); 79 svfloat32_t q_67 = svmla_lane (sv_f32 (d->poly_0246[3]), r, p_1357, 3); 80 svfloat32_t q_47 = svmla_x (pg, q_45, r2, q_67); 81 svfloat32_t q_03 = svmla_x (pg, q_01, r2, q_23); 82 svfloat32_t y = svmla_x (pg, q_03, r4, q_47); 83 84 /* Using hi = Log10(2)*n + r*InvLn(10) is faster but less accurate. */ 85 svfloat32_t hi = svmla_x (pg, r, n, d->ln2); 86 hi = svmul_x (pg, hi, d->inv_ln10); 87 88 if (unlikely (svptest_any (pg, special))) 89 return special_case (u_off, hi, r2, y, special); 90 return svmla_x (svptrue_b32 (), hi, r2, y); 91 } 92 93 TEST_SIG (SV, F, 1, log10, 0.01, 11.1) 94 TEST_ULP (SV_NAME_F1 (log10), 2.82) 95 TEST_DISABLE_FENV (SV_NAME_F1 (log10)) 96 TEST_INTERVAL (SV_NAME_F1 (log10), -0.0, -0x1p126, 100) 97 TEST_INTERVAL (SV_NAME_F1 (log10), 0x1p-149, 0x1p-126, 4000) 98 TEST_INTERVAL (SV_NAME_F1 (log10), 0x1p-126, 0x1p-23, 50000) 99 TEST_INTERVAL (SV_NAME_F1 (log10), 0x1p-23, 1.0, 50000) 100 TEST_INTERVAL (SV_NAME_F1 (log10), 1.0, 100, 50000) 101 TEST_INTERVAL (SV_NAME_F1 (log10), 100, inf, 50000) 102 CLOSE_SVE_ATTR 103