1 /* 2 * Single-precision vector atanh(x) function. 3 * 4 * Copyright (c) 2023-2024, Arm Limited. 5 * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception 6 */ 7 8 #include "sv_math.h" 9 #include "test_sig.h" 10 #include "test_defs.h" 11 12 #include "sv_log1pf_inline.h" 13 14 #define One (0x3f800000) 15 #define Half (0x3f000000) 16 17 static svfloat32_t NOINLINE 18 special_case (svuint32_t iax, svuint32_t sign, svfloat32_t halfsign, 19 svfloat32_t y, svbool_t special) 20 { 21 svfloat32_t x = svreinterpret_f32 (sveor_x (svptrue_b32 (), iax, sign)); 22 y = svmul_x (svptrue_b32 (), halfsign, y); 23 return sv_call_f32 (atanhf, x, y, special); 24 } 25 26 /* Approximation for vector single-precision atanh(x) using modified log1p. 27 The maximum error is 1.99 ULP: 28 _ZGVsMxv_atanhf(0x1.f1583p-5) got 0x1.f1f4fap-5 29 want 0x1.f1f4f6p-5. */ 30 svfloat32_t SV_NAME_F1 (atanh) (svfloat32_t x, const svbool_t pg) 31 { 32 svfloat32_t ax = svabs_x (pg, x); 33 svuint32_t iax = svreinterpret_u32 (ax); 34 svuint32_t sign = sveor_x (pg, svreinterpret_u32 (x), iax); 35 svfloat32_t halfsign = svreinterpret_f32 (svorr_x (pg, sign, Half)); 36 svbool_t special = svcmpge (pg, iax, One); 37 38 /* Computation is performed based on the following sequence of equality: 39 * (1+x)/(1-x) = 1 + 2x/(1-x). */ 40 svfloat32_t y = svadd_x (pg, ax, ax); 41 y = svdiv_x (pg, y, svsub_x (pg, sv_f32 (1), ax)); 42 /* ln((1+x)/(1-x)) = ln(1+2x/(1-x)) = ln(1 + y). */ 43 y = sv_log1pf_inline (y, pg); 44 45 if (unlikely (svptest_any (pg, special))) 46 return special_case (iax, sign, halfsign, y, special); 47 48 return svmul_x (pg, halfsign, y); 49 } 50 51 TEST_SIG (SV, F, 1, atanh, -1.0, 1.0) 52 TEST_ULP (SV_NAME_F1 (atanh), 1.50) 53 TEST_DISABLE_FENV (SV_NAME_F1 (atanh)) 54 TEST_SYM_INTERVAL (SV_NAME_F1 (atanh), 0, 0x1p-12, 1000) 55 TEST_SYM_INTERVAL (SV_NAME_F1 (atanh), 0x1p-12, 1, 20000) 56 TEST_SYM_INTERVAL (SV_NAME_F1 (atanh), 1, inf, 1000) 57 /* atanh is asymptotic at 1, which is the default control value - have to set 58 -c 0 specially to ensure fp exceptions are triggered correctly (choice of 59 control lane is irrelevant if fp exceptions are disabled). */ 60 TEST_CONTROL_VALUE (SV_NAME_F1 (atanh), 0) 61 CLOSE_SVE_ATTR 62