xref: /freebsd/contrib/arm-optimized-routines/math/aarch64/advsimd/expm1f.c (revision dd21556857e8d40f66bf5ad54754d9d52669ebf7)
1 /*
2  * Single-precision vector exp(x) - 1 function.
3  *
4  * Copyright (c) 2022-2024, Arm Limited.
5  * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception
6  */
7 
8 #include "v_math.h"
9 #include "test_sig.h"
10 #include "test_defs.h"
11 #include "v_expm1f_inline.h"
12 
13 static const struct data
14 {
15   struct v_expm1f_data d;
16 #if WANT_SIMD_EXCEPT
17   uint32x4_t thresh;
18 #else
19   float32x4_t oflow_bound;
20 #endif
21 } data = {
22   .d = V_EXPM1F_DATA,
23 #if !WANT_SIMD_EXCEPT
24   /* Value above which expm1f(x) should overflow. Absolute value of the
25      underflow bound is greater than this, so it catches both cases - there is
26      a small window where fallbacks are triggered unnecessarily.  */
27   .oflow_bound = V4 (0x1.5ebc4p+6),
28 #else
29   /* asuint(oflow_bound) - asuint(0x1p-23), shifted left by 1 for absolute
30      compare.  */
31   .thresh = V4 (0x1d5ebc40),
32 #endif
33 };
34 
35 /* asuint(0x1p-23), shifted by 1 for abs compare.  */
36 #define TinyBound v_u32 (0x34000000 << 1)
37 
38 static float32x4_t VPCS_ATTR NOINLINE
39 special_case (float32x4_t x, uint32x4_t special, const struct data *d)
40 {
41   return v_call_f32 (
42       expm1f, x, expm1f_inline (v_zerofy_f32 (x, special), &d->d), special);
43 }
44 
45 /* Single-precision vector exp(x) - 1 function.
46    The maximum error is 1.62 ULP:
47    _ZGVnN4v_expm1f(0x1.85f83p-2) got 0x1.da9f4p-2
48 				want 0x1.da9f44p-2.  */
49 float32x4_t VPCS_ATTR NOINLINE V_NAME_F1 (expm1) (float32x4_t x)
50 {
51   const struct data *d = ptr_barrier (&data);
52 
53 #if WANT_SIMD_EXCEPT
54   uint32x4_t ix = vreinterpretq_u32_f32 (x);
55   /* If fp exceptions are to be triggered correctly, fall back to scalar for
56      |x| < 2^-23, |x| > oflow_bound, Inf & NaN. Add ix to itself for
57      shift-left by 1, and compare with thresh which was left-shifted offline -
58      this is effectively an absolute compare.  */
59   uint32x4_t special
60       = vcgeq_u32 (vsubq_u32 (vaddq_u32 (ix, ix), TinyBound), d->thresh);
61 #else
62   /* Handles very large values (+ve and -ve), +/-NaN, +/-Inf.  */
63   uint32x4_t special = vcagtq_f32 (x, d->oflow_bound);
64 #endif
65 
66   if (unlikely (v_any_u32 (special)))
67     return special_case (x, special, d);
68 
69   /* expm1(x) ~= p * t + (t - 1).  */
70   return expm1f_inline (x, &d->d);
71 }
72 
73 HALF_WIDTH_ALIAS_F1 (expm1)
74 
75 TEST_SIG (V, F, 1, expm1, -9.9, 9.9)
76 TEST_ULP (V_NAME_F1 (expm1), 1.13)
77 TEST_DISABLE_FENV_IF_NOT (V_NAME_F1 (expm1), WANT_SIMD_EXCEPT)
78 TEST_SYM_INTERVAL (V_NAME_F1 (expm1), 0, 0x1p-23, 1000)
79 TEST_INTERVAL (V_NAME_F1 (expm1), -0x1p-23, 0x1.5ebc4p+6, 1000000)
80 TEST_INTERVAL (V_NAME_F1 (expm1), -0x1p-23, -0x1.9bbabcp+6, 1000000)
81 TEST_INTERVAL (V_NAME_F1 (expm1), 0x1.5ebc4p+6, inf, 1000)
82 TEST_INTERVAL (V_NAME_F1 (expm1), -0x1.9bbabcp+6, -inf, 1000)
83