1*f3087befSAndrew Turner /*
2*f3087befSAndrew Turner * Single-precision vector 2^x function.
3*f3087befSAndrew Turner *
4*f3087befSAndrew Turner * Copyright (c) 2019-2024, Arm Limited.
5*f3087befSAndrew Turner * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception
6*f3087befSAndrew Turner */
7*f3087befSAndrew Turner
8*f3087befSAndrew Turner #include "v_math.h"
9*f3087befSAndrew Turner #include "test_defs.h"
10*f3087befSAndrew Turner #include "test_sig.h"
11*f3087befSAndrew Turner
12*f3087befSAndrew Turner static const struct data
13*f3087befSAndrew Turner {
14*f3087befSAndrew Turner float32x4_t c1, c3;
15*f3087befSAndrew Turner uint32x4_t exponent_bias, special_offset, special_bias;
16*f3087befSAndrew Turner #if !WANT_SIMD_EXCEPT
17*f3087befSAndrew Turner float32x4_t scale_thresh, special_bound;
18*f3087befSAndrew Turner #endif
19*f3087befSAndrew Turner float c0, c2, c4, zero;
20*f3087befSAndrew Turner } data = {
21*f3087befSAndrew Turner /* maxerr: 1.962 ulp. */
22*f3087befSAndrew Turner .c0 = 0x1.59977ap-10f,
23*f3087befSAndrew Turner .c1 = V4 (0x1.3ce9e4p-7f),
24*f3087befSAndrew Turner .c2 = 0x1.c6bd32p-5f,
25*f3087befSAndrew Turner .c3 = V4 (0x1.ebf9bcp-3f),
26*f3087befSAndrew Turner .c4 = 0x1.62e422p-1f,
27*f3087befSAndrew Turner .exponent_bias = V4 (0x3f800000),
28*f3087befSAndrew Turner .special_offset = V4 (0x82000000),
29*f3087befSAndrew Turner .special_bias = V4 (0x7f000000),
30*f3087befSAndrew Turner #if !WANT_SIMD_EXCEPT
31*f3087befSAndrew Turner .special_bound = V4 (126.0f),
32*f3087befSAndrew Turner .scale_thresh = V4 (192.0f),
33*f3087befSAndrew Turner #endif
34*f3087befSAndrew Turner };
35*f3087befSAndrew Turner
36*f3087befSAndrew Turner #if WANT_SIMD_EXCEPT
37*f3087befSAndrew Turner
38*f3087befSAndrew Turner # define TinyBound v_u32 (0x20000000) /* asuint (0x1p-63). */
39*f3087befSAndrew Turner # define BigBound v_u32 (0x42800000) /* asuint (0x1p6). */
40*f3087befSAndrew Turner # define SpecialBound v_u32 (0x22800000) /* BigBound - TinyBound. */
41*f3087befSAndrew Turner
42*f3087befSAndrew Turner static float32x4_t VPCS_ATTR NOINLINE
special_case(float32x4_t x,float32x4_t y,uint32x4_t cmp)43*f3087befSAndrew Turner special_case (float32x4_t x, float32x4_t y, uint32x4_t cmp)
44*f3087befSAndrew Turner {
45*f3087befSAndrew Turner /* If fenv exceptions are to be triggered correctly, fall back to the scalar
46*f3087befSAndrew Turner routine for special lanes. */
47*f3087befSAndrew Turner return v_call_f32 (exp2f, x, y, cmp);
48*f3087befSAndrew Turner }
49*f3087befSAndrew Turner
50*f3087befSAndrew Turner #else
51*f3087befSAndrew Turner
52*f3087befSAndrew Turner static float32x4_t VPCS_ATTR NOINLINE
special_case(float32x4_t poly,float32x4_t n,uint32x4_t e,uint32x4_t cmp1,float32x4_t scale,const struct data * d)53*f3087befSAndrew Turner special_case (float32x4_t poly, float32x4_t n, uint32x4_t e, uint32x4_t cmp1,
54*f3087befSAndrew Turner float32x4_t scale, const struct data *d)
55*f3087befSAndrew Turner {
56*f3087befSAndrew Turner /* 2^n may overflow, break it up into s1*s2. */
57*f3087befSAndrew Turner uint32x4_t b = vandq_u32 (vclezq_f32 (n), d->special_offset);
58*f3087befSAndrew Turner float32x4_t s1 = vreinterpretq_f32_u32 (vaddq_u32 (b, d->special_bias));
59*f3087befSAndrew Turner float32x4_t s2 = vreinterpretq_f32_u32 (vsubq_u32 (e, b));
60*f3087befSAndrew Turner uint32x4_t cmp2 = vcagtq_f32 (n, d->scale_thresh);
61*f3087befSAndrew Turner float32x4_t r2 = vmulq_f32 (s1, s1);
62*f3087befSAndrew Turner float32x4_t r1 = vmulq_f32 (vfmaq_f32 (s2, poly, s2), s1);
63*f3087befSAndrew Turner /* Similar to r1 but avoids double rounding in the subnormal range. */
64*f3087befSAndrew Turner float32x4_t r0 = vfmaq_f32 (scale, poly, scale);
65*f3087befSAndrew Turner float32x4_t r = vbslq_f32 (cmp1, r1, r0);
66*f3087befSAndrew Turner return vbslq_f32 (cmp2, r2, r);
67*f3087befSAndrew Turner }
68*f3087befSAndrew Turner
69*f3087befSAndrew Turner #endif
70*f3087befSAndrew Turner
V_NAME_F1(exp2)71*f3087befSAndrew Turner float32x4_t VPCS_ATTR NOINLINE V_NAME_F1 (exp2) (float32x4_t x)
72*f3087befSAndrew Turner {
73*f3087befSAndrew Turner const struct data *d = ptr_barrier (&data);
74*f3087befSAndrew Turner
75*f3087befSAndrew Turner #if WANT_SIMD_EXCEPT
76*f3087befSAndrew Turner /* asuint(|x|) - TinyBound >= BigBound - TinyBound. */
77*f3087befSAndrew Turner uint32x4_t ia = vreinterpretq_u32_f32 (vabsq_f32 (x));
78*f3087befSAndrew Turner uint32x4_t cmp = vcgeq_u32 (vsubq_u32 (ia, TinyBound), SpecialBound);
79*f3087befSAndrew Turner float32x4_t xm = x;
80*f3087befSAndrew Turner /* If any lanes are special, mask them with 1 and retain a copy of x to allow
81*f3087befSAndrew Turner special_case to fix special lanes later. This is only necessary if fenv
82*f3087befSAndrew Turner exceptions are to be triggered correctly. */
83*f3087befSAndrew Turner if (unlikely (v_any_u32 (cmp)))
84*f3087befSAndrew Turner x = vbslq_f32 (cmp, v_f32 (1), x);
85*f3087befSAndrew Turner #endif
86*f3087befSAndrew Turner
87*f3087befSAndrew Turner /* exp2(x) = 2^n (1 + poly(r)), with 1 + poly(r) in [1/sqrt(2),sqrt(2)]
88*f3087befSAndrew Turner x = n + r, with r in [-1/2, 1/2]. */
89*f3087befSAndrew Turner float32x4_t n = vrndaq_f32 (x);
90*f3087befSAndrew Turner float32x4_t r = vsubq_f32 (x, n);
91*f3087befSAndrew Turner uint32x4_t e = vshlq_n_u32 (vreinterpretq_u32_s32 (vcvtaq_s32_f32 (x)), 23);
92*f3087befSAndrew Turner float32x4_t scale = vreinterpretq_f32_u32 (vaddq_u32 (e, d->exponent_bias));
93*f3087befSAndrew Turner
94*f3087befSAndrew Turner #if !WANT_SIMD_EXCEPT
95*f3087befSAndrew Turner uint32x4_t cmp = vcagtq_f32 (n, d->special_bound);
96*f3087befSAndrew Turner #endif
97*f3087befSAndrew Turner
98*f3087befSAndrew Turner float32x4_t c024 = vld1q_f32 (&d->c0);
99*f3087befSAndrew Turner float32x4_t r2 = vmulq_f32 (r, r);
100*f3087befSAndrew Turner float32x4_t p = vfmaq_laneq_f32 (d->c1, r, c024, 0);
101*f3087befSAndrew Turner float32x4_t q = vfmaq_laneq_f32 (d->c3, r, c024, 1);
102*f3087befSAndrew Turner q = vfmaq_f32 (q, p, r2);
103*f3087befSAndrew Turner p = vmulq_laneq_f32 (r, c024, 2);
104*f3087befSAndrew Turner float32x4_t poly = vfmaq_f32 (p, q, r2);
105*f3087befSAndrew Turner
106*f3087befSAndrew Turner if (unlikely (v_any_u32 (cmp)))
107*f3087befSAndrew Turner #if WANT_SIMD_EXCEPT
108*f3087befSAndrew Turner return special_case (xm, vfmaq_f32 (scale, poly, scale), cmp);
109*f3087befSAndrew Turner #else
110*f3087befSAndrew Turner return special_case (poly, n, e, cmp, scale, d);
111*f3087befSAndrew Turner #endif
112*f3087befSAndrew Turner
113*f3087befSAndrew Turner return vfmaq_f32 (scale, poly, scale);
114*f3087befSAndrew Turner }
115*f3087befSAndrew Turner
116*f3087befSAndrew Turner HALF_WIDTH_ALIAS_F1 (exp2)
117*f3087befSAndrew Turner
118*f3087befSAndrew Turner TEST_SIG (V, F, 1, exp2, -9.9, 9.9)
119*f3087befSAndrew Turner TEST_ULP (V_NAME_F1 (exp2), 1.49)
120*f3087befSAndrew Turner TEST_DISABLE_FENV_IF_NOT (V_NAME_F1 (exp2), WANT_SIMD_EXCEPT)
121*f3087befSAndrew Turner TEST_INTERVAL (V_NAME_F1 (exp2), 0, 0xffff0000, 10000)
122*f3087befSAndrew Turner TEST_SYM_INTERVAL (V_NAME_F1 (exp2), 0x1p-14, 0x1p8, 500000)
123