1*f3087befSAndrew Turner /*
2*f3087befSAndrew Turner * Double-precision vector atanh(x) function.
3*f3087befSAndrew Turner *
4*f3087befSAndrew Turner * Copyright (c) 2022-2024, Arm Limited.
5*f3087befSAndrew Turner * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception
6*f3087befSAndrew Turner */
7*f3087befSAndrew Turner
8*f3087befSAndrew Turner #include "v_math.h"
9*f3087befSAndrew Turner #include "test_sig.h"
10*f3087befSAndrew Turner #include "test_defs.h"
11*f3087befSAndrew Turner
12*f3087befSAndrew Turner #define WANT_V_LOG1P_K0_SHORTCUT 0
13*f3087befSAndrew Turner #include "v_log1p_inline.h"
14*f3087befSAndrew Turner
15*f3087befSAndrew Turner const static struct data
16*f3087befSAndrew Turner {
17*f3087befSAndrew Turner struct v_log1p_data log1p_consts;
18*f3087befSAndrew Turner uint64x2_t one;
19*f3087befSAndrew Turner uint64x2_t sign_mask;
20*f3087befSAndrew Turner } data = { .log1p_consts = V_LOG1P_CONSTANTS_TABLE,
21*f3087befSAndrew Turner .one = V2 (0x3ff0000000000000),
22*f3087befSAndrew Turner .sign_mask = V2 (0x8000000000000000) };
23*f3087befSAndrew Turner
24*f3087befSAndrew Turner static float64x2_t VPCS_ATTR NOINLINE
special_case(float64x2_t x,float64x2_t halfsign,float64x2_t y,uint64x2_t special,const struct data * d)25*f3087befSAndrew Turner special_case (float64x2_t x, float64x2_t halfsign, float64x2_t y,
26*f3087befSAndrew Turner uint64x2_t special, const struct data *d)
27*f3087befSAndrew Turner {
28*f3087befSAndrew Turner y = log1p_inline (y, &d->log1p_consts);
29*f3087befSAndrew Turner return v_call_f64 (atanh, vbslq_f64 (d->sign_mask, halfsign, x),
30*f3087befSAndrew Turner vmulq_f64 (halfsign, y), special);
31*f3087befSAndrew Turner }
32*f3087befSAndrew Turner
33*f3087befSAndrew Turner /* Approximation for vector double-precision atanh(x) using modified log1p.
34*f3087befSAndrew Turner The greatest observed error is 3.31 ULP:
35*f3087befSAndrew Turner _ZGVnN2v_atanh(0x1.ffae6288b601p-6) got 0x1.ffd8ff31b5019p-6
36*f3087befSAndrew Turner want 0x1.ffd8ff31b501cp-6. */
37*f3087befSAndrew Turner VPCS_ATTR
V_NAME_D1(atanh)38*f3087befSAndrew Turner float64x2_t V_NAME_D1 (atanh) (float64x2_t x)
39*f3087befSAndrew Turner {
40*f3087befSAndrew Turner const struct data *d = ptr_barrier (&data);
41*f3087befSAndrew Turner
42*f3087befSAndrew Turner float64x2_t halfsign = vbslq_f64 (d->sign_mask, x, v_f64 (0.5));
43*f3087befSAndrew Turner float64x2_t ax = vabsq_f64 (x);
44*f3087befSAndrew Turner uint64x2_t ia = vreinterpretq_u64_f64 (ax);
45*f3087befSAndrew Turner uint64x2_t special = vcgeq_u64 (ia, d->one);
46*f3087befSAndrew Turner
47*f3087befSAndrew Turner #if WANT_SIMD_EXCEPT
48*f3087befSAndrew Turner ax = v_zerofy_f64 (ax, special);
49*f3087befSAndrew Turner #endif
50*f3087befSAndrew Turner
51*f3087befSAndrew Turner float64x2_t y;
52*f3087befSAndrew Turner y = vaddq_f64 (ax, ax);
53*f3087befSAndrew Turner y = vdivq_f64 (y, vsubq_f64 (vreinterpretq_f64_u64 (d->one), ax));
54*f3087befSAndrew Turner
55*f3087befSAndrew Turner if (unlikely (v_any_u64 (special)))
56*f3087befSAndrew Turner #if WANT_SIMD_EXCEPT
57*f3087befSAndrew Turner return special_case (x, halfsign, y, special, d);
58*f3087befSAndrew Turner #else
59*f3087befSAndrew Turner return special_case (ax, halfsign, y, special, d);
60*f3087befSAndrew Turner #endif
61*f3087befSAndrew Turner
62*f3087befSAndrew Turner y = log1p_inline (y, &d->log1p_consts);
63*f3087befSAndrew Turner return vmulq_f64 (y, halfsign);
64*f3087befSAndrew Turner }
65*f3087befSAndrew Turner
66*f3087befSAndrew Turner TEST_SIG (V, D, 1, atanh, -1.0, 1.0)
67*f3087befSAndrew Turner TEST_DISABLE_FENV_IF_NOT (V_NAME_D1 (atanh), WANT_SIMD_EXCEPT)
68*f3087befSAndrew Turner TEST_ULP (V_NAME_D1 (atanh), 3.32)
69*f3087befSAndrew Turner TEST_SYM_INTERVAL (V_NAME_D1 (atanh), 0, 0x1p-23, 10000)
70*f3087befSAndrew Turner TEST_SYM_INTERVAL (V_NAME_D1 (atanh), 0x1p-23, 1, 90000)
71*f3087befSAndrew Turner TEST_SYM_INTERVAL (V_NAME_D1 (atanh), 1, inf, 100)
72*f3087befSAndrew Turner /* atanh is asymptotic at 1, which is the default control value - have to set
73*f3087befSAndrew Turner -c 0 specially to ensure fp exceptions are triggered correctly (choice of
74*f3087befSAndrew Turner control lane is irrelevant if fp exceptions are disabled). */
75*f3087befSAndrew Turner TEST_CONTROL_VALUE (V_NAME_D1 (atanh), 0)
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