1 /* 2 * Double-precision vector atan2(x) function. 3 * 4 * Copyright (c) 2021-2024, Arm Limited. 5 * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception 6 */ 7 8 #include "v_math.h" 9 #include "test_sig.h" 10 #include "test_defs.h" 11 12 static const struct data 13 { 14 float64x2_t c0, c2, c4, c6, c8, c10, c12, c14, c16, c18; 15 float64x2_t pi_over_2; 16 double c1, c3, c5, c7, c9, c11, c13, c15, c17, c19; 17 uint64x2_t zeroinfnan, minustwo; 18 } data = { 19 /* Coefficients of polynomial P such that atan(x)~x+x*P(x^2) on 20 [2**-1022, 1.0]. */ 21 .c0 = V2 (-0x1.5555555555555p-2), 22 .c1 = 0x1.99999999996c1p-3, 23 .c2 = V2 (-0x1.2492492478f88p-3), 24 .c3 = 0x1.c71c71bc3951cp-4, 25 .c4 = V2 (-0x1.745d160a7e368p-4), 26 .c5 = 0x1.3b139b6a88ba1p-4, 27 .c6 = V2 (-0x1.11100ee084227p-4), 28 .c7 = 0x1.e1d0f9696f63bp-5, 29 .c8 = V2 (-0x1.aebfe7b418581p-5), 30 .c9 = 0x1.842dbe9b0d916p-5, 31 .c10 = V2 (-0x1.5d30140ae5e99p-5), 32 .c11 = 0x1.338e31eb2fbbcp-5, 33 .c12 = V2 (-0x1.00e6eece7de8p-5), 34 .c13 = 0x1.860897b29e5efp-6, 35 .c14 = V2 (-0x1.0051381722a59p-6), 36 .c15 = 0x1.14e9dc19a4a4ep-7, 37 .c16 = V2 (-0x1.d0062b42fe3bfp-9), 38 .c17 = 0x1.17739e210171ap-10, 39 .c18 = V2 (-0x1.ab24da7be7402p-13), 40 .c19 = 0x1.358851160a528p-16, 41 .pi_over_2 = V2 (0x1.921fb54442d18p+0), 42 .zeroinfnan = V2 (2 * 0x7ff0000000000000ul - 1), 43 .minustwo = V2 (0xc000000000000000), 44 }; 45 46 #define SignMask v_u64 (0x8000000000000000) 47 48 /* Special cases i.e. 0, infinity, NaN (fall back to scalar calls). */ 49 static float64x2_t VPCS_ATTR NOINLINE 50 special_case (float64x2_t y, float64x2_t x, float64x2_t ret, 51 uint64x2_t sign_xy, uint64x2_t cmp) 52 { 53 /* Account for the sign of x and y. */ 54 ret = vreinterpretq_f64_u64 ( 55 veorq_u64 (vreinterpretq_u64_f64 (ret), sign_xy)); 56 return v_call2_f64 (atan2, y, x, ret, cmp); 57 } 58 59 /* Returns 1 if input is the bit representation of 0, infinity or nan. */ 60 static inline uint64x2_t 61 zeroinfnan (uint64x2_t i, const struct data *d) 62 { 63 /* (2 * i - 1) >= (2 * asuint64 (INFINITY) - 1). */ 64 return vcgeq_u64 (vsubq_u64 (vaddq_u64 (i, i), v_u64 (1)), d->zeroinfnan); 65 } 66 67 /* Fast implementation of vector atan2. 68 Maximum observed error is 2.8 ulps: 69 _ZGVnN2vv_atan2 (0x1.9651a429a859ap+5, 0x1.953075f4ee26p+5) 70 got 0x1.92d628ab678ccp-1 71 want 0x1.92d628ab678cfp-1. */ 72 float64x2_t VPCS_ATTR V_NAME_D2 (atan2) (float64x2_t y, float64x2_t x) 73 { 74 const struct data *d = ptr_barrier (&data); 75 76 uint64x2_t ix = vreinterpretq_u64_f64 (x); 77 uint64x2_t iy = vreinterpretq_u64_f64 (y); 78 79 uint64x2_t special_cases 80 = vorrq_u64 (zeroinfnan (ix, d), zeroinfnan (iy, d)); 81 82 uint64x2_t sign_x = vandq_u64 (ix, SignMask); 83 uint64x2_t sign_y = vandq_u64 (iy, SignMask); 84 uint64x2_t sign_xy = veorq_u64 (sign_x, sign_y); 85 86 float64x2_t ax = vabsq_f64 (x); 87 float64x2_t ay = vabsq_f64 (y); 88 89 uint64x2_t pred_xlt0 = vcltzq_f64 (x); 90 uint64x2_t pred_aygtax = vcagtq_f64 (y, x); 91 92 /* Set up z for call to atan. */ 93 float64x2_t n = vbslq_f64 (pred_aygtax, vnegq_f64 (ax), ay); 94 float64x2_t q = vbslq_f64 (pred_aygtax, ay, ax); 95 float64x2_t z = vdivq_f64 (n, q); 96 97 /* Work out the correct shift. */ 98 float64x2_t shift 99 = vreinterpretq_f64_u64 (vandq_u64 (pred_xlt0, d->minustwo)); 100 shift = vbslq_f64 (pred_aygtax, vaddq_f64 (shift, v_f64 (1.0)), shift); 101 shift = vmulq_f64 (shift, d->pi_over_2); 102 103 /* Calculate the polynomial approximation. 104 Use split Estrin scheme for P(z^2) with deg(P)=19. Use split instead of 105 full scheme to avoid underflow in x^16. 106 The order 19 polynomial P approximates 107 (atan(sqrt(x))-sqrt(x))/x^(3/2). */ 108 float64x2_t z2 = vmulq_f64 (z, z); 109 float64x2_t x2 = vmulq_f64 (z2, z2); 110 float64x2_t x4 = vmulq_f64 (x2, x2); 111 float64x2_t x8 = vmulq_f64 (x4, x4); 112 113 float64x2_t c13 = vld1q_f64 (&d->c1); 114 float64x2_t c57 = vld1q_f64 (&d->c5); 115 float64x2_t c911 = vld1q_f64 (&d->c9); 116 float64x2_t c1315 = vld1q_f64 (&d->c13); 117 float64x2_t c1719 = vld1q_f64 (&d->c17); 118 119 /* estrin_7. */ 120 float64x2_t p01 = vfmaq_laneq_f64 (d->c0, z2, c13, 0); 121 float64x2_t p23 = vfmaq_laneq_f64 (d->c2, z2, c13, 1); 122 float64x2_t p03 = vfmaq_f64 (p01, x2, p23); 123 124 float64x2_t p45 = vfmaq_laneq_f64 (d->c4, z2, c57, 0); 125 float64x2_t p67 = vfmaq_laneq_f64 (d->c6, z2, c57, 1); 126 float64x2_t p47 = vfmaq_f64 (p45, x2, p67); 127 128 float64x2_t p07 = vfmaq_f64 (p03, x4, p47); 129 130 /* estrin_11. */ 131 float64x2_t p89 = vfmaq_laneq_f64 (d->c8, z2, c911, 0); 132 float64x2_t p1011 = vfmaq_laneq_f64 (d->c10, z2, c911, 1); 133 float64x2_t p811 = vfmaq_f64 (p89, x2, p1011); 134 135 float64x2_t p1213 = vfmaq_laneq_f64 (d->c12, z2, c1315, 0); 136 float64x2_t p1415 = vfmaq_laneq_f64 (d->c14, z2, c1315, 1); 137 float64x2_t p1215 = vfmaq_f64 (p1213, x2, p1415); 138 139 float64x2_t p1617 = vfmaq_laneq_f64 (d->c16, z2, c1719, 0); 140 float64x2_t p1819 = vfmaq_laneq_f64 (d->c18, z2, c1719, 1); 141 float64x2_t p1619 = vfmaq_f64 (p1617, x2, p1819); 142 143 float64x2_t p815 = vfmaq_f64 (p811, x4, p1215); 144 float64x2_t p819 = vfmaq_f64 (p815, x8, p1619); 145 146 float64x2_t ret = vfmaq_f64 (p07, p819, x8); 147 148 /* Finalize. y = shift + z + z^3 * P(z^2). */ 149 ret = vfmaq_f64 (z, ret, vmulq_f64 (z2, z)); 150 ret = vaddq_f64 (ret, shift); 151 152 if (unlikely (v_any_u64 (special_cases))) 153 return special_case (y, x, ret, sign_xy, special_cases); 154 155 /* Account for the sign of x and y. */ 156 ret = vreinterpretq_f64_u64 ( 157 veorq_u64 (vreinterpretq_u64_f64 (ret), sign_xy)); 158 159 return ret; 160 } 161 162 /* Arity of 2 means no mathbench entry emitted. See test/mathbench_funcs.h. */ 163 TEST_SIG (V, D, 2, atan2) 164 // TODO tighten this once __v_atan2 is fixed 165 TEST_ULP (V_NAME_D2 (atan2), 2.9) 166 TEST_DISABLE_FENV (V_NAME_D2 (atan2)) 167 TEST_INTERVAL (V_NAME_D2 (atan2), -10.0, 10.0, 50000) 168 TEST_INTERVAL (V_NAME_D2 (atan2), -1.0, 1.0, 40000) 169 TEST_INTERVAL (V_NAME_D2 (atan2), 0.0, 1.0, 40000) 170 TEST_INTERVAL (V_NAME_D2 (atan2), 1.0, 100.0, 40000) 171 TEST_INTERVAL (V_NAME_D2 (atan2), 1e6, 1e32, 40000) 172