1*f3087befSAndrew Turner /*
2*f3087befSAndrew Turner * Single-precision vector acosh(x) function.
3*f3087befSAndrew Turner * Copyright (c) 2023-2024, Arm Limited.
4*f3087befSAndrew Turner * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception
5*f3087befSAndrew Turner */
6*f3087befSAndrew Turner
7*f3087befSAndrew Turner #include "v_math.h"
8*f3087befSAndrew Turner #include "test_sig.h"
9*f3087befSAndrew Turner #include "test_defs.h"
10*f3087befSAndrew Turner #include "v_log1pf_inline.h"
11*f3087befSAndrew Turner
12*f3087befSAndrew Turner #define SquareLim 0x1p64
13*f3087befSAndrew Turner
14*f3087befSAndrew Turner const static struct data
15*f3087befSAndrew Turner {
16*f3087befSAndrew Turner struct v_log1pf_data log1pf_consts;
17*f3087befSAndrew Turner uint32x4_t one;
18*f3087befSAndrew Turner } data = { .log1pf_consts = V_LOG1PF_CONSTANTS_TABLE, .one = V4 (0x3f800000) };
19*f3087befSAndrew Turner
20*f3087befSAndrew Turner #define Thresh vdup_n_u16 (0x2000) /* top(asuint(SquareLim) - asuint(1)). */
21*f3087befSAndrew Turner
22*f3087befSAndrew Turner static float32x4_t NOINLINE VPCS_ATTR
special_case(float32x4_t x,float32x4_t y,uint16x4_t special,const struct v_log1pf_data * d)23*f3087befSAndrew Turner special_case (float32x4_t x, float32x4_t y, uint16x4_t special,
24*f3087befSAndrew Turner const struct v_log1pf_data *d)
25*f3087befSAndrew Turner {
26*f3087befSAndrew Turner return v_call_f32 (acoshf, x, log1pf_inline (y, d), vmovl_u16 (special));
27*f3087befSAndrew Turner }
28*f3087befSAndrew Turner
29*f3087befSAndrew Turner /* Vector approximation for single-precision acosh, based on log1p. Maximum
30*f3087befSAndrew Turner error depends on WANT_SIMD_EXCEPT. With SIMD fp exceptions enabled, it
31*f3087befSAndrew Turner is 3.00 ULP:
32*f3087befSAndrew Turner _ZGVnN4v_acoshf(0x1.01df3ap+0) got 0x1.ef0a82p-4
33*f3087befSAndrew Turner want 0x1.ef0a7cp-4.
34*f3087befSAndrew Turner With exceptions disabled, we can compute u with a shorter dependency chain,
35*f3087befSAndrew Turner which gives maximum error of 3.22 ULP:
36*f3087befSAndrew Turner _ZGVnN4v_acoshf(0x1.007ef2p+0) got 0x1.fdcdccp-5
37*f3087befSAndrew Turner want 0x1.fdcdd2p-5. */
38*f3087befSAndrew Turner
V_NAME_F1(acosh)39*f3087befSAndrew Turner float32x4_t VPCS_ATTR NOINLINE V_NAME_F1 (acosh) (float32x4_t x)
40*f3087befSAndrew Turner {
41*f3087befSAndrew Turner const struct data *d = ptr_barrier (&data);
42*f3087befSAndrew Turner uint32x4_t ix = vreinterpretq_u32_f32 (x);
43*f3087befSAndrew Turner uint16x4_t special = vcge_u16 (vsubhn_u32 (ix, d->one), Thresh);
44*f3087befSAndrew Turner
45*f3087befSAndrew Turner #if WANT_SIMD_EXCEPT
46*f3087befSAndrew Turner /* Mask special lanes with 1 to side-step spurious invalid or overflow. Use
47*f3087befSAndrew Turner only xm1 to calculate u, as operating on x will trigger invalid for NaN.
48*f3087befSAndrew Turner Widening sign-extend special predicate in order to mask with it. */
49*f3087befSAndrew Turner uint32x4_t p
50*f3087befSAndrew Turner = vreinterpretq_u32_s32 (vmovl_s16 (vreinterpret_s16_u16 (special)));
51*f3087befSAndrew Turner float32x4_t xm1 = v_zerofy_f32 (vsubq_f32 (x, v_f32 (1)), p);
52*f3087befSAndrew Turner float32x4_t u = vfmaq_f32 (vaddq_f32 (xm1, xm1), xm1, xm1);
53*f3087befSAndrew Turner #else
54*f3087befSAndrew Turner float32x4_t xm1 = vsubq_f32 (x, vreinterpretq_f32_u32 (d->one));
55*f3087befSAndrew Turner float32x4_t u
56*f3087befSAndrew Turner = vmulq_f32 (xm1, vaddq_f32 (x, vreinterpretq_f32_u32 (d->one)));
57*f3087befSAndrew Turner #endif
58*f3087befSAndrew Turner
59*f3087befSAndrew Turner float32x4_t y = vaddq_f32 (xm1, vsqrtq_f32 (u));
60*f3087befSAndrew Turner
61*f3087befSAndrew Turner if (unlikely (v_any_u16h (special)))
62*f3087befSAndrew Turner return special_case (x, y, special, &d->log1pf_consts);
63*f3087befSAndrew Turner return log1pf_inline (y, &d->log1pf_consts);
64*f3087befSAndrew Turner }
65*f3087befSAndrew Turner
66*f3087befSAndrew Turner HALF_WIDTH_ALIAS_F1 (acosh)
67*f3087befSAndrew Turner
68*f3087befSAndrew Turner TEST_SIG (V, F, 1, acosh, 1.0, 10.0)
69*f3087befSAndrew Turner #if WANT_SIMD_EXCEPT
70*f3087befSAndrew Turner TEST_ULP (V_NAME_F1 (acosh), 2.50)
71*f3087befSAndrew Turner #else
72*f3087befSAndrew Turner TEST_ULP (V_NAME_F1 (acosh), 2.78)
73*f3087befSAndrew Turner #endif
74*f3087befSAndrew Turner TEST_DISABLE_FENV_IF_NOT (V_NAME_F1 (acosh), WANT_SIMD_EXCEPT)
75*f3087befSAndrew Turner TEST_INTERVAL (V_NAME_F1 (acosh), 0, 1, 500)
76*f3087befSAndrew Turner TEST_INTERVAL (V_NAME_F1 (acosh), 1, SquareLim, 100000)
77*f3087befSAndrew Turner TEST_INTERVAL (V_NAME_F1 (acosh), SquareLim, inf, 1000)
78*f3087befSAndrew Turner TEST_INTERVAL (V_NAME_F1 (acosh), -0, -inf, 1000)
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