1*f05948d4SEnji Cooper.\" Copyright (c) 2008 Christian Brueffer 2*f05948d4SEnji Cooper.\" Copyright (c) 2008 Jeffrey Roberson 3*f05948d4SEnji Cooper.\" All rights reserved. 4*f05948d4SEnji Cooper.\" 5*f05948d4SEnji Cooper.\" Redistribution and use in source and binary forms, with or without 6*f05948d4SEnji Cooper.\" modification, are permitted provided that the following conditions 7*f05948d4SEnji Cooper.\" are met: 8*f05948d4SEnji Cooper.\" 1. Redistributions of source code must retain the above copyright 9*f05948d4SEnji Cooper.\" notice, this list of conditions and the following disclaimer. 10*f05948d4SEnji Cooper.\" 2. Redistributions in binary form must reproduce the above copyright 11*f05948d4SEnji Cooper.\" notice, this list of conditions and the following disclaimer in the 12*f05948d4SEnji Cooper.\" documentation and/or other materials provided with the distribution. 13*f05948d4SEnji Cooper.\" 14*f05948d4SEnji Cooper.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15*f05948d4SEnji Cooper.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16*f05948d4SEnji Cooper.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17*f05948d4SEnji Cooper.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18*f05948d4SEnji Cooper.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19*f05948d4SEnji Cooper.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20*f05948d4SEnji Cooper.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21*f05948d4SEnji Cooper.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22*f05948d4SEnji Cooper.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23*f05948d4SEnji Cooper.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24*f05948d4SEnji Cooper.\" SUCH DAMAGE. 25*f05948d4SEnji Cooper.\" 26*f05948d4SEnji Cooper.Dd July 3, 2018 27*f05948d4SEnji Cooper.Dt CPUSET 1 28*f05948d4SEnji Cooper.Os 29*f05948d4SEnji Cooper.Sh NAME 30*f05948d4SEnji Cooper.Nm cpuset 31*f05948d4SEnji Cooper.Nd "configure processor sets" 32*f05948d4SEnji Cooper.Sh SYNOPSIS 33*f05948d4SEnji Cooper.Nm 34*f05948d4SEnji Cooper.Op Fl l Ar cpu-list 35*f05948d4SEnji Cooper.Op Fl n Ar policy:domain-list 36*f05948d4SEnji Cooper.Op Fl s Ar setid 37*f05948d4SEnji Cooper.Ar cmd ... 38*f05948d4SEnji Cooper.Nm 39*f05948d4SEnji Cooper.Op Fl l Ar cpu-list 40*f05948d4SEnji Cooper.Op Fl n Ar policy:domain-list 41*f05948d4SEnji Cooper.Op Fl s Ar setid 42*f05948d4SEnji Cooper.Fl p Ar pid 43*f05948d4SEnji Cooper.Nm 44*f05948d4SEnji Cooper.Op Fl c 45*f05948d4SEnji Cooper.Op Fl l Ar cpu-list 46*f05948d4SEnji Cooper.Op Fl n Ar policy:domain-list 47*f05948d4SEnji Cooper.Fl C 48*f05948d4SEnji Cooper.Fl p Ar pid 49*f05948d4SEnji Cooper.Nm 50*f05948d4SEnji Cooper.Op Fl c 51*f05948d4SEnji Cooper.Op Fl l Ar cpu-list 52*f05948d4SEnji Cooper.Op Fl n Ar policy:domain-list 53*f05948d4SEnji Cooper.Op Fl j Ar jail | Fl p Ar pid | Fl t Ar tid | Fl s Ar setid | Fl x Ar irq 54*f05948d4SEnji Cooper.Nm 55*f05948d4SEnji Cooper.Fl g 56*f05948d4SEnji Cooper.Op Fl cir 57*f05948d4SEnji Cooper.Op Fl d Ar domain | Fl j Ar jail | Fl p Ar pid | Fl t Ar tid | Fl s Ar setid | Fl x Ar irq 58*f05948d4SEnji Cooper.Sh DESCRIPTION 59*f05948d4SEnji CooperThe 60*f05948d4SEnji Cooper.Nm 61*f05948d4SEnji Coopercommand can be used to assign processor sets to processes, run commands 62*f05948d4SEnji Cooperconstrained to a given set or list of processors and memory domains, and query 63*f05948d4SEnji Cooperinformation about processor binding, memory binding and policy, sets, and 64*f05948d4SEnji Cooperavailable processors and memory domains in the system. 65*f05948d4SEnji Cooper.Pp 66*f05948d4SEnji Cooper.Nm 67*f05948d4SEnji Cooperrequires a target to modify or query. 68*f05948d4SEnji CooperThe target may be specified as a command, process id, thread id, a 69*f05948d4SEnji Coopercpuset id, an irq, a jail, or a NUMA domain. 70*f05948d4SEnji CooperUsing 71*f05948d4SEnji Cooper.Fl g 72*f05948d4SEnji Cooperthe target's set id or mask may be queried. 73*f05948d4SEnji CooperUsing 74*f05948d4SEnji Cooper.Fl l 75*f05948d4SEnji Cooperor 76*f05948d4SEnji Cooper.Fl s 77*f05948d4SEnji Cooperthe target's CPU mask or set id may be set. 78*f05948d4SEnji CooperIf no target is specified, 79*f05948d4SEnji Cooper.Nm 80*f05948d4SEnji Cooperoperates on itself. 81*f05948d4SEnji CooperNot all combinations of operations and targets are supported. 82*f05948d4SEnji CooperFor example, 83*f05948d4SEnji Cooperyou may not set the id of an existing set or query and launch a command 84*f05948d4SEnji Cooperat the same time. 85*f05948d4SEnji Cooper.Pp 86*f05948d4SEnji CooperThere are two sets applicable to each process and one private mask per thread. 87*f05948d4SEnji CooperEvery process in the system belongs to a cpuset. 88*f05948d4SEnji CooperBy default processes are started in set 1. 89*f05948d4SEnji CooperThe mask or id may be queried using 90*f05948d4SEnji Cooper.Fl c . 91*f05948d4SEnji CooperEach thread also has a private mask of CPUs it is allowed to run 92*f05948d4SEnji Cooperon that must be a subset of the assigned set. 93*f05948d4SEnji CooperAnd finally, there is a root set, numbered 0, that is immutable. 94*f05948d4SEnji CooperThis last set is the list of all possible CPUs in the system and is 95*f05948d4SEnji Cooperqueried using 96*f05948d4SEnji Cooper.Fl r . 97*f05948d4SEnji Cooper.Pp 98*f05948d4SEnji CooperMost sets include NUMA memory domain and policy information. 99*f05948d4SEnji CooperThis can be inspected with 100*f05948d4SEnji Cooper.Fl g 101*f05948d4SEnji Cooperand set with 102*f05948d4SEnji Cooper.Fl n . 103*f05948d4SEnji CooperThis will specify which NUMA domains are visible to the process and 104*f05948d4SEnji Cooperaffect where anonymous memory and file pages will be stored on first access. 105*f05948d4SEnji CooperFiles accessed first by other processes may specify conflicting policy. 106*f05948d4SEnji Cooper.Pp 107*f05948d4SEnji CooperWhen running a command it may join a set specified with 108*f05948d4SEnji Cooper.Fl s 109*f05948d4SEnji Cooperotherwise a new set is created. 110*f05948d4SEnji CooperIn addition, a mask for the command may be specified using 111*f05948d4SEnji Cooper.Fl l . 112*f05948d4SEnji CooperWhen used in conjunction with 113*f05948d4SEnji Cooper.Fl c 114*f05948d4SEnji Cooperthe mask modifies the supplied or created set rather than the private mask 115*f05948d4SEnji Cooperfor the thread. 116*f05948d4SEnji Cooper.Pp 117*f05948d4SEnji CooperThe options are as follows: 118*f05948d4SEnji Cooper.Bl -tag -width ".Fl l Ar cpu-list" 119*f05948d4SEnji Cooper.It Fl C 120*f05948d4SEnji CooperCreate a new cpuset and assign the target process to that set. 121*f05948d4SEnji Cooper.It Fl c 122*f05948d4SEnji CooperThe requested operation should reference the cpuset available via the 123*f05948d4SEnji Coopertarget specifier. 124*f05948d4SEnji Cooper.It Fl d Ar domain 125*f05948d4SEnji CooperSpecifies a NUMA domain id as the target of the operation. 126*f05948d4SEnji CooperThis can only be used to query the cpus visible in each numberd domain. 127*f05948d4SEnji Cooper.It Fl g 128*f05948d4SEnji CooperCauses 129*f05948d4SEnji Cooper.Nm 130*f05948d4SEnji Cooperto print either a list of valid CPUs or, using 131*f05948d4SEnji Cooper.Fl i , 132*f05948d4SEnji Cooperthe id of the target. 133*f05948d4SEnji Cooper.It Fl i 134*f05948d4SEnji CooperWhen used with the 135*f05948d4SEnji Cooper.Fl g 136*f05948d4SEnji Cooperoption print the id rather than the valid mask of the target. 137*f05948d4SEnji Cooper.It Fl j Ar jail 138*f05948d4SEnji CooperSpecifies a jail id or name as the target of the operation. 139*f05948d4SEnji Cooper.It Fl l Ar cpu-list 140*f05948d4SEnji CooperSpecifies a list of CPUs to apply to a target. 141*f05948d4SEnji CooperSpecification may include 142*f05948d4SEnji Coopernumbers separated by '-' for ranges and commas separating individual numbers. 143*f05948d4SEnji CooperA special list of 144*f05948d4SEnji Cooper.Dq all 145*f05948d4SEnji Coopermay be specified in which case the list includes all CPUs from the root set. 146*f05948d4SEnji Cooper.It Fl n Ar policy:domain-list 147*f05948d4SEnji CooperSpecifies a list of domains and allocation policy to apply to a target. 148*f05948d4SEnji CooperRanges may be specified as in 149*f05948d4SEnji Cooper.Fl l . 150*f05948d4SEnji CooperValid policies include first-touch (ft), round-robin (rr), prefer and 151*f05948d4SEnji Cooperinterleave (il). 152*f05948d4SEnji CooperFirst-touch allocates on the local domain when memory is available. 153*f05948d4SEnji CooperRound-robin alternates between every possible domain page at a time. 154*f05948d4SEnji CooperThe prefer policy accepts only a single domain in the set. 155*f05948d4SEnji CooperThe parent of the set is consulted if the preferred domain is unavailable. 156*f05948d4SEnji CooperInterleave operates like round-robin with an implementation defined stripe 157*f05948d4SEnji Cooperwidth. 158*f05948d4SEnji CooperSee 159*f05948d4SEnji Cooper.Xr domainset 9 160*f05948d4SEnji Cooperfor more details on policies. 161*f05948d4SEnji Cooper.It Fl p Ar pid 162*f05948d4SEnji CooperSpecifies a pid as the target of the operation. 163*f05948d4SEnji Cooper.It Fl s Ar setid 164*f05948d4SEnji CooperSpecifies a set id as the target of the operation. 165*f05948d4SEnji Cooper.It Fl r 166*f05948d4SEnji CooperThe requested operation should reference the root set available via the 167*f05948d4SEnji Coopertarget specifier. 168*f05948d4SEnji Cooper.It Fl t Ar tid 169*f05948d4SEnji CooperSpecifies a thread id as the target of the operation. 170*f05948d4SEnji Cooper.It Fl x Ar irq 171*f05948d4SEnji CooperSpecifies an irq as the target of the operation. 172*f05948d4SEnji Cooper.El 173*f05948d4SEnji Cooper.Sh EXIT STATUS 174*f05948d4SEnji Cooper.Ex -std 175*f05948d4SEnji Cooper.Sh EXAMPLES 176*f05948d4SEnji CooperCreate a new group with CPUs 0-4 inclusive and run 177*f05948d4SEnji Cooper.Pa /bin/sh 178*f05948d4SEnji Cooperon it: 179*f05948d4SEnji Cooper.Dl cpuset -c -l 0-4 /bin/sh 180*f05948d4SEnji Cooper.Pp 181*f05948d4SEnji CooperQuery the mask of CPUs the 182*f05948d4SEnji Cooper.Aq sh pid 183*f05948d4SEnji Cooperis allowed to run on: 184*f05948d4SEnji Cooper.Dl cpuset -g -p <sh pid> 185*f05948d4SEnji Cooper.Pp 186*f05948d4SEnji CooperRestrict 187*f05948d4SEnji Cooper.Pa /bin/sh 188*f05948d4SEnji Cooperto run on CPUs 0 and 2 while its group is still allowed to run on 189*f05948d4SEnji CooperCPUs 0-4: 190*f05948d4SEnji Cooper.Dl cpuset -l 0,2 -p <sh pid> 191*f05948d4SEnji Cooper.Pp 192*f05948d4SEnji CooperModify the cpuset 193*f05948d4SEnji Cooper.Pa /bin/sh 194*f05948d4SEnji Cooperbelongs to restricting it to CPUs 0 and 2: 195*f05948d4SEnji Cooper.Dl cpuset -l 0,2 -c -p <sh pid> 196*f05948d4SEnji Cooper.Pp 197*f05948d4SEnji CooperModify the cpuset all threads are in by default to contain only 198*f05948d4SEnji Cooperthe first 4 CPUs, leaving the rest idle: 199*f05948d4SEnji Cooper.Dl cpuset -l 0-3 -s 1 200*f05948d4SEnji Cooper.Pp 201*f05948d4SEnji CooperPrint the id of the cpuset 202*f05948d4SEnji Cooper.Pa /bin/sh 203*f05948d4SEnji Cooperis in: 204*f05948d4SEnji Cooper.Dl cpuset -g -i -p <sh pid> 205*f05948d4SEnji Cooper.Pp 206*f05948d4SEnji CooperMove the 207*f05948d4SEnji Cooper.Ar pid 208*f05948d4SEnji Cooperinto the specified cpuset 209*f05948d4SEnji Cooper.Ar setid 210*f05948d4SEnji Cooperso it may be managed with other pids in that set: 211*f05948d4SEnji Cooper.Dl cpuset -s <setid> -p <pid> 212*f05948d4SEnji Cooper.Pp 213*f05948d4SEnji CooperCreate a new cpuset that is restricted to CPUs 0 and 2 and move 214*f05948d4SEnji Cooper.Ar pid 215*f05948d4SEnji Cooperinto the new set: 216*f05948d4SEnji Cooper.Dl cpuset -C -c -l 0,2 -p <pid> 217*f05948d4SEnji Cooper.Sh SEE ALSO 218*f05948d4SEnji Cooper.Xr nproc 1 , 219*f05948d4SEnji Cooper.Xr cpuset 2 , 220*f05948d4SEnji Cooper.Xr rctl 8 221*f05948d4SEnji Cooper.Sh HISTORY 222*f05948d4SEnji CooperThe 223*f05948d4SEnji Cooper.Nm 224*f05948d4SEnji Coopercommand first appeared in 225*f05948d4SEnji Cooper.Fx 7.1 . 226*f05948d4SEnji Cooper.Sh AUTHORS 227*f05948d4SEnji Cooper.An Jeffrey Roberson Aq Mt jeff@FreeBSD.org 228