Searched refs:MDIO_AN_REG_CL37_FC_LD (Results 1 – 2 of 2) sorted by relevance
| /titanic_50/usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/ |
| H A D | clc_reg.h | 437 #define MDIO_AN_REG_CL37_FC_LD 0xffe4 macro
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| /titanic_50/usr/src/uts/common/io/bnxe/577xx/common/ |
| H A D | bnxe_clc.c | 3850 MDIO_AN_REG_CL37_FC_LD, &ld_pause); in elink_ext_phy_update_adv_fc()
7859 MDIO_AN_REG_CL37_FC_LD, &ld_pause); in elink_8073_resolve_fc()
8063 MDIO_AN_DEVAD, MDIO_AN_REG_CL37_FC_LD, &cl37_val); in elink_8073_set_pause_cl37()
8087 MDIO_AN_DEVAD, MDIO_AN_REG_CL37_FC_LD, cl37_val); in elink_8073_set_pause_cl37()
8227 elink_cl45_read(cb, phy, MDIO_AN_DEVAD, MDIO_AN_REG_CL37_FC_LD, &tmp1); in elink_8073_config_init()
8228 elink_cl45_write(cb, phy, MDIO_AN_DEVAD, MDIO_AN_REG_CL37_FC_LD, in elink_8073_config_init()
9978 MDIO_AN_DEVAD, MDIO_AN_REG_CL37_FC_LD, 0x0020); in elink_8726_config_init()
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