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Searched refs:xge_assert (Results 1 – 19 of 19) sorted by relevance

/titanic_44/usr/src/uts/common/io/xge/hal/include/
H A Dxge-list.h66 xge_assert(header != NULL); in xge_list_is_empty()
81 xge_assert(header != NULL); in xge_list_first_get()
82 xge_assert(header->next != NULL); in xge_list_first_get()
83 xge_assert(header->prev != NULL); in xge_list_first_get()
100 xge_assert(item != NULL); in xge_list_remove()
101 xge_assert(item->next != NULL); in xge_list_remove()
102 xge_assert(item->prev != NULL); in xge_list_remove()
123 xge_assert(new_item != NULL); in xge_list_insert()
124 xge_assert(prev_item != NULL); in xge_list_insert()
125 xge_assert(prev_item->next != NULL); in xge_list_insert()
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H A Dxgehal-mm.h105 xge_assert(memblock); in __hal_mempool_item_priv()
108 xge_assert(offset >= 0 && offset < mempool->memblock_size); in __hal_mempool_item_priv()
111 xge_assert((*memblock_item_idx) < mempool->items_per_memblock); in __hal_mempool_item_priv()
134 xge_assert(mempool->memblocks_arr[memblock_idx]); in __hal_mempool_memblock()
H A Dxge-debug.h400 #define xge_assert(test) { \ macro
404 #define xge_assert(test) macro
/titanic_44/usr/src/uts/common/io/xge/hal/xgehal/
H A Dxgehal-driver.c129 xge_assert(xge_offsetof(xge_hal_pci_bar0_t, adapter_status) == in xge_hal_driver_bar0_offset_check()
131 xge_assert(xge_offsetof(xge_hal_pci_bar0_t, tx_traffic_int) == in xge_hal_driver_bar0_offset_check()
133 xge_assert(xge_offsetof(xge_hal_pci_bar0_t, dtx_control) == in xge_hal_driver_bar0_offset_check()
135 xge_assert(xge_offsetof(xge_hal_pci_bar0_t, tx_fifo_partition_0) == in xge_hal_driver_bar0_offset_check()
137 xge_assert(xge_offsetof(xge_hal_pci_bar0_t, pcc_enable) == in xge_hal_driver_bar0_offset_check()
139 xge_assert(xge_offsetof(xge_hal_pci_bar0_t, prc_rxd0_n[0]) == in xge_hal_driver_bar0_offset_check()
141 xge_assert(xge_offsetof(xge_hal_pci_bar0_t, rti_command_mem) == in xge_hal_driver_bar0_offset_check()
143 xge_assert(xge_offsetof(xge_hal_pci_bar0_t, mac_cfg) == in xge_hal_driver_bar0_offset_check()
145 xge_assert(xge_offsetof(xge_hal_pci_bar0_t, rmac_addr_cmd_mem) == in xge_hal_driver_bar0_offset_check()
147 xge_assert(xge_offsetof(xge_hal_pci_bar0_t, mac_link_util) == in xge_hal_driver_bar0_offset_check()
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H A Dxgehal-channel.c88 xge_assert(rxdp->host_control!=0); in __hal_channel_dtr_next_not_completed()
105 xge_assert(post_qid + 1 >= XGE_HAL_MIN_FIFO_NUM && in __hal_channel_allocate()
110 xge_assert(post_qid + 1 >= XGE_HAL_MIN_RING_NUM && in __hal_channel_allocate()
115 xge_assert(size); in __hal_channel_allocate()
143 xge_assert(channel->pdev); in __hal_channel_free()
157 xge_assert(size); in __hal_channel_free()
231 xge_assert(channel->pdev); in __hal_channel_terminate()
306 xge_assert(device); in xge_hal_channel_open()
307 xge_assert(attr); in xge_hal_channel_open()
328 xge_assert((channel->type == XGE_HAL_CHANNEL_TYPE_FIFO) || in xge_hal_channel_open()
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H A Dxgehal-fifo-fp.c34 xge_assert(txdp); in __hal_fifo_txdl_priv()
38 xge_assert(txdl_priv); in __hal_fifo_txdl_priv()
39 xge_assert(txdl_priv->dma_object); in __hal_fifo_txdl_priv()
40 xge_assert(txdl_priv->dma_addr); in __hal_fifo_txdl_priv()
42 xge_assert(txdl_priv->dma_object->handle == txdl_priv->dma_handle); in __hal_fifo_txdl_priv()
139 xge_assert(invalid_frags == 0); in __hal_fifo_txdl_free_many()
151 xge_assert(frags); in __hal_fifo_txdl_free_many()
164 xge_assert(frags == 0) in __hal_fifo_txdl_free_many()
175 xge_assert(((xge_hal_channel_t *)channelh)->reserve_length + in __hal_fifo_txdl_restore_many()
180 xge_assert(i); in __hal_fifo_txdl_restore_many()
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H A Dxgehal-ring.c85 xge_assert(from_item); in __hal_ring_rxdblock_link()
90 xge_assert(to_item); in __hal_ring_rxdblock_link()
132 xge_assert(item); in __hal_ring_mempool_item_alloc()
133 xge_assert(ring); in __hal_ring_mempool_item_alloc()
172 xge_assert(memblock_index <= 0xFFFF); in __hal_ring_mempool_item_alloc()
173 xge_assert(i <= 0xFFFF); in __hal_ring_mempool_item_alloc()
218 xge_assert(status == XGE_HAL_OK); in __hal_ring_initial_replenish()
257 xge_assert(queue->configured); in __hal_ring_open()
315 xge_assert(ring->reserved_rxds_arr[0] == in __hal_ring_open()
353 xge_assert(ring->channel.pdev); in __hal_ring_close()
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H A Dxgehal-ring-fp.c35 xge_assert(rxdp); in __hal_ring_rxd_priv()
38 xge_assert(ring); in __hal_ring_rxd_priv()
57 xge_assert(rxd_priv); in __hal_ring_rxd_priv()
58 xge_assert(rxd_priv->dma_object); in __hal_ring_rxd_priv()
60 xge_assert(rxd_priv->dma_object->handle == rxd_priv->dma_handle); in __hal_ring_rxd_priv()
62 xge_assert(rxd_priv->dma_object->addr + rxd_priv->dma_offset == in __hal_ring_rxd_priv()
516 xge_assert((char *)prev_dtrh + in xge_hal_ring_dtr_pre_post()
706 xge_assert(((xge_hal_ring_rxd_5_t *) in xge_hal_ring_dtr_next_completed()
712 xge_assert(rxdp->host_control!=0); in xge_hal_ring_dtr_next_completed()
721 xge_assert(*t_code != XGE_HAL_RXD_T_CODE_UNUSED_C); in xge_hal_ring_dtr_next_completed()
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H A Dxge-queue.c100 xge_assert(queue->tail_ptr >= queue->head_ptr); in __queue_consume()
101 xge_assert(queue->tail_ptr >= queue->start_ptr && in __queue_consume()
103 xge_assert(queue->head_ptr >= queue->start_ptr && in __queue_consume()
147 xge_assert(real_size <= XGE_QUEUE_BUF_SIZE); in xge_queue_produce()
215 xge_assert(queue->tail_ptr >= queue->head_ptr); in xge_queue_produce()
216 xge_assert(queue->tail_ptr >= queue->start_ptr && in xge_queue_produce()
218 xge_assert(queue->head_ptr >= queue->start_ptr && in xge_queue_produce()
348 xge_assert(!xge_list_is_empty(&queue->list_head)); in __io_queue_grow()
H A Dxgehal-fifo.c42 xge_assert(item); in __hal_fifo_mempool_item_alloc()
48 xge_assert(txdl_priv); in __hal_fifo_mempool_item_alloc()
113 xge_assert(item); in __hal_fifo_mempool_item_free()
120 xge_assert(txdl_priv); in __hal_fifo_mempool_item_free()
289 xge_assert(fifo->channel.reserve_length); in __hal_fifo_open()
293 xge_assert(max_arr_index); in __hal_fifo_open()
527 xge_assert(txdp); in __hal_fifo_dtr_align_alloc_map()
H A Dxgehal-channel-fp.c142 xge_assert(channel->work_arr[channel->post_index] == NULL); in __hal_channel_dtr_post()
156 xge_assert(channel->work_arr); in __hal_channel_dtr_try_complete()
157 xge_assert(channel->compl_index < channel->length); in __hal_channel_dtr_try_complete()
H A Dxgehal-stats.c42 xge_assert(!stats->is_initialized); in __hal_stats_initialize()
220 xge_assert(stats->hw_info); in __hal_stats_disable()
223 xge_assert(hldev); in __hal_stats_disable()
252 xge_assert(stats->hw_info); in __hal_stats_terminate()
255 xge_assert(hldev); in __hal_stats_terminate()
256 xge_assert(stats->is_initialized); in __hal_stats_terminate()
312 xge_assert(stats->hw_info); in __hal_stats_enable()
315 xge_assert(hldev); in __hal_stats_enable()
714 xge_assert(xge_hal_device_check_id(hldev) != XGE_HAL_CARD_TITAN) in xge_hal_stats_hw()
779 xge_assert(xge_hal_device_check_id(hldev) == XGE_HAL_CARD_TITAN) in xge_hal_stats_pcim()
H A Dxgehal-mm.c359 xge_assert(mempool->memblocks_arr[i]); in __hal_mempool_destroy()
360 xge_assert(mempool->memblocks_dma_arr + i); in __hal_mempool_destroy()
H A Dxgehal-device.c73 xge_assert(((xge_hal_device_t*)data)->magic == XGE_HAL_MAGIC); in __hal_device_event_queued()
545 xge_assert(xge_hal_device_check_id(hldev) == XGE_HAL_CARD_HERC); in __hal_fix_time_ival_herc()
1319 xge_assert(default_dtx_cfg); in __hal_device_xaui_configure()
2060 xge_assert(((spdm_bar_num != 0) && (spdm_bar_num != 1))); in __hal_device_rth_spdm_configure()
4295 xge_assert(!hldev->stats.is_enabled); in xge_hal_device_disable()
4787 xge_assert(hldev); in xge_hal_device_promisc_enable()
4826 xge_assert(hldev); in xge_hal_device_promisc_disable()
5200 xge_assert(hldev->regh0); in xge_hal_device_initialize()
5201 xge_assert(hldev->regh1); in xge_hal_device_initialize()
5202 xge_assert(hldev->bar0); in xge_hal_device_initialize()
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H A Dxgehal-device-fp.c81 xge_assert(bar0); in xge_hal_device_bar0_set()
94 xge_assert(isrbar0); in xge_hal_device_isrbar0_set()
112 xge_assert(bar1); in xge_hal_device_bar1_set()
113 xge_assert(fifo); in xge_hal_device_bar1_set()
H A Dxgehal-mgmt.c254 xge_assert(xge_hal_device_check_id(hldev) != XGE_HAL_CARD_TITAN); in xge_hal_mgmt_hw_stats()
293 xge_assert(xge_hal_device_check_id(hldev) != XGE_HAL_CARD_TITAN); in xge_hal_mgmt_hw_stats_off()
336 xge_assert(xge_hal_device_check_id(hldev) == XGE_HAL_CARD_TITAN); in xge_hal_mgmt_pcim_stats()
377 xge_assert(xge_hal_device_check_id(hldev) == XGE_HAL_CARD_TITAN); in xge_hal_mgmt_pcim_stats_off()
H A Dxgehal-mgmtaux.c38 xge_assert(retsize < bufsize); \
1407 xge_assert(hldev->dump_buf != NULL); in xge_hal_aux_device_dump()
/titanic_44/usr/src/uts/common/io/xge/drv/
H A Dxgell.c204 xge_assert(mutex_owned(&bf_pool->pool_lock)); in xgell_rx_buffer_replenish_all()
208 xge_assert(bf_pool->head); in xgell_rx_buffer_replenish_all()
215 xge_assert(rx_buffer->dma_addr); in xgell_rx_buffer_replenish_all()
239 xge_assert(mutex_owned(&bf_pool->pool_lock)); in xgell_rx_buffer_release()
440 xge_assert(rx_buffer != NULL); in xgell_rx_destroy_buffer_pool()
459 xge_assert(!mutex_owned(&bf_pool->pool_lock)); in xgell_rx_destroy_buffer_pool()
545 xge_assert(rx_buffer); in xgell_rx_dtr_replenish()
546 xge_assert(rx_buffer->dma_addr); in xgell_rx_dtr_replenish()
731 xge_assert(dma_data == rx_buffer->dma_addr); in xgell_rx_1b_callback()
916 xge_assert(txd_priv->dma_handles[i]); in xgell_xmit_compl()
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H A Dxge.c888 xge_assert(lldev->intr_table != NULL); in xge_add_intrs()
1051 xge_assert(lldev->intr_table != NULL); in xge_rem_intrs()