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/titanic_41/usr/src/uts/i86pc/cpu/genuineintel/
H A Dgintel_main.c192 uint16_t mscode = MCAX86_MSERRCODE(status); in gintel_disp_match() local
198 if (mscode & MSCOD_MEM_SPARE_MEM) { in gintel_disp_match()
200 } else if (mscode & (MSCOD_MEM_ECC_READ | in gintel_disp_match()
206 } else if (mscode & (MSCOD_MEM_WR_PARITY | in gintel_disp_match()
209 } else if (mscode & MSCOD_MEM_ADDR_PARITY) { in gintel_disp_match()
211 } else if (mscode & MSCOD_MEM_REDUNDANT_MEM) { in gintel_disp_match()
213 } else if (mscode & MSCOD_MEM_ILLEGAL_ADDR) { in gintel_disp_match()
215 } else if (mscode & MSCOD_MEM_BAD_ID) { in gintel_disp_match()