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Searched refs:write_sysreg (Results 1 – 25 of 47) sorted by relevance

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/linux/arch/arm64/include/asm/
H A Darm_pmuv3.h23 write_sysreg(val, pmevcntr##n##_el0)
30 write_sysreg(val, pmevtyper##n##_el0)
67 write_sysreg(val, pmcr_el0); in write_pmcr()
77 write_sysreg(val, pmselr_el0); in write_pmselr()
82 write_sysreg(val, pmccntr_el0); in write_pmccntr()
102 write_sysreg(val, pmcntenset_el0); in write_pmcntenset()
107 write_sysreg(val, pmcntenclr_el0); in write_pmcntenclr()
112 write_sysreg(val, pmintenset_el1); in write_pmintenset()
117 write_sysreg(val, pmintenclr_el1); in write_pmintenclr()
122 write_sysreg(val, pmccfiltr_el0); in write_pmccfiltr()
[all …]
H A Darch_timer.h105 write_sysreg(val, cntp_ctl_el0); in arch_timer_reg_write_cp15()
109 write_sysreg(val, cntp_cval_el0); in arch_timer_reg_write_cp15()
117 write_sysreg(val, cntv_ctl_el0); in arch_timer_reg_write_cp15()
121 write_sysreg(val, cntv_cval_el0); in arch_timer_reg_write_cp15()
166 write_sysreg(cntkctl, cntkctl_el1); in arch_timer_set_cntkctl()
H A Dmmu_context.h35 write_sysreg(task_pid_nr(next), contextidr_el1); in contextidr_thread_switch()
46 write_sysreg(ttbr, ttbr0_el1); in cpu_set_reserved_ttbr0_nosync()
80 write_sysreg(tcr, tcr_el1); in __cpu_set_tcr_t0sz()
140 write_sysreg(ttbr0, ttbr0_el1); in cpu_install_ttbr0()
H A Dcpuidle.h20 write_sysreg(c->daif_bits | PSR_I_BIT | PSR_F_BIT, \
32 write_sysreg(c->daif_bits, daif); \
H A Dhardirq.h44 write_sysreg(___hcr | HCR_TGE, hcr_el2); \
85 write_sysreg(___hcr, hcr_el2); \
H A Ddaifflags.h117 write_sysreg(flags, daif); in local_daif_restore()
142 write_sysreg(flags, daif); in local_daif_inherit()
H A Duaccess.h67 write_sysreg(ttbr - RESERVED_SWAPPER_OFFSET, ttbr0_el1); in __uaccess_ttbr0_disable()
69 write_sysreg(ttbr, ttbr1_el1); in __uaccess_ttbr0_disable()
90 write_sysreg(ttbr1, ttbr1_el1); in __uaccess_ttbr0_enable()
93 write_sysreg(ttbr0, ttbr0_el1); in __uaccess_ttbr0_enable()
H A Dfpsimd.h38 write_sysreg(old | set, cpacr_el1); in cpacr_save_enable_kernel_sve()
48 write_sysreg(old | set, cpacr_el1); in cpacr_save_enable_kernel_sme()
55 write_sysreg(cpacr, cpacr_el1); in cpacr_restore()
H A Ddcc.h37 write_sysreg((unsigned char)c, dbgdtrtx_el0); in __dcc_putchar()
/linux/tools/testing/selftests/kvm/aarch64/
H A Ddebug-exceptions.c45 write_sysreg(val, reg_name##0_el1); \
48 write_sysreg(val, reg_name##1_el1); \
51 write_sysreg(val, reg_name##2_el1); \
54 write_sysreg(val, reg_name##3_el1); \
57 write_sysreg(val, reg_name##4_el1); \
60 write_sysreg(val, reg_name##5_el1); \
63 write_sysreg(val, reg_name##6_el1); \
66 write_sysreg(val, reg_name##7_el1); \
69 write_sysreg(val, reg_name##8_el1); \
72 write_sysreg(val, reg_name##9_el1); \
[all …]
H A Dvpmu_counter_access.c65 write_sysreg(sel, pmselr_el0); in read_sel_evcntr()
73 write_sysreg(sel, pmselr_el0); in write_sel_evcntr()
75 write_sysreg(val, pmxevcntr_el0); in write_sel_evcntr()
82 write_sysreg(sel, pmselr_el0); in read_sel_evtyper()
90 write_sysreg(sel, pmselr_el0); in write_sel_evtyper()
92 write_sysreg(val, pmxevtyper_el0); in write_sel_evtyper()
102 write_sysreg(pmcr | ARMV8_PMU_PMCR_P, pmcr_el0); in pmu_disable_reset()
115 write_sysreg(val, pmevcntr##n##_el0)
131 write_sysreg(val, pmevtyper##n##_el0)
220 write_sysreg(test_bit, pmcntenset_el0); in test_bitmap_pmu_regs()
[all …]
/linux/arch/arm64/kvm/hyp/include/hyp/
H A Dsysreg-sr.h142 write_sysreg(ctxt_sys_reg(ctxt, MDSCR_EL1), mdscr_el1); in __sysreg_restore_common_state()
151 write_sysreg(ctxt_sys_reg(ctxt, TPIDR_EL0), tpidr_el0); in __sysreg_restore_user_state()
152 write_sysreg(ctxt_sys_reg(ctxt, TPIDRRO_EL0), tpidrro_el0); in __sysreg_restore_user_state()
157 write_sysreg(ctxt_sys_reg(ctxt, MPIDR_EL1), vmpidr_el2); in __sysreg_restore_el1_state()
198 write_sysreg(ctxt_sys_reg(ctxt, PAR_EL1), par_el1); in __sysreg_restore_el1_state()
199 write_sysreg(ctxt_sys_reg(ctxt, TPIDR_EL1), tpidr_el1); in __sysreg_restore_el1_state()
224 write_sysreg(ctxt_sys_reg(ctxt, SP_EL1), sp_el1); in __sysreg_restore_el1_state()
294 write_sysreg(vcpu->arch.ctxt.spsr_abt, spsr_abt); in __sysreg32_restore_state()
295 write_sysreg(vcpu->arch.ctxt.spsr_und, spsr_und); in __sysreg32_restore_state()
296 write_sysreg(vcpu->arch.ctxt.spsr_irq, spsr_irq); in __sysreg32_restore_state()
[all …]
H A Ddebug-sr.h19 #define write_debug(v,r,n) write_sysreg(v, r##n##_el1)
125 write_sysreg(ctxt_sys_reg(ctxt, MDCCINT_EL1), mdccint_el1); in __debug_restore_state()
/linux/arch/arm/include/asm/
H A Darm_pmuv3.h104 write_sysreg(val, PMEVCNTR##n)
111 write_sysreg(val, PMEVTYPER##n)
138 write_sysreg(val, PMCR); in write_pmcr()
148 write_sysreg(val, PMSELR); in write_pmselr()
153 write_sysreg(val, PMCCNTR); in write_pmccntr()
170 write_sysreg(val, PMCNTENSET); in write_pmcntenset()
175 write_sysreg(val, PMCNTENCLR); in write_pmcntenclr()
180 write_sysreg(val, PMINTENSET); in write_pmintenset()
185 write_sysreg(val, PMINTENCLR); in write_pmintenclr()
190 write_sysreg(val, PMCCFILTR); in write_pmccfiltr()
[all …]
H A Darch_gicv3.h44 write_sysreg(val, a32); \
69 write_sysreg(val, ICC_DIR); in CPUIF_MAP()
84 write_sysreg(val, ICC_CTLR); in gic_write_ctlr()
95 write_sysreg(val, ICC_IGRPEN1); in gic_write_grpen1()
101 write_sysreg(val, ICC_SGI1R); in gic_write_sgi1r()
111 write_sysreg(val, ICC_SRE); in gic_write_sre()
117 write_sysreg(val, ICC_BPR1); in gic_write_bpr1()
127 write_sysreg(val, ICC_PMR); in gic_write_pmr()
/linux/tools/testing/selftests/kvm/include/aarch64/
H A Darch_timer.h55 write_sysreg(cval, cntv_cval_el0); in timer_set_cval()
58 write_sysreg(cval, cntp_cval_el0); in timer_set_cval()
86 write_sysreg(tval, cntv_tval_el0); in timer_set_tval()
89 write_sysreg(tval, cntp_tval_el0); in timer_set_tval()
118 write_sysreg(ctl, cntv_ctl_el0); in timer_set_ctl()
121 write_sysreg(ctl, cntp_ctl_el0); in timer_set_ctl()
/linux/arch/arm64/kvm/hyp/nvhe/
H A Dswitch.c66 write_sysreg(__this_cpu_read(kvm_hyp_vector), vbar_el2); in __activate_traps()
108 write_sysreg(this_cpu_ptr(&kvm_init_params)->hcr_el2, hcr_el2); in __deactivate_traps()
111 write_sysreg(__kvm_hyp_host_vector, vbar_el2); in __deactivate_traps()
141 write_sysreg(pmu->events_host, pmcntenclr_el0); in __pmu_switch_to_guest()
144 write_sysreg(pmu->events_guest, pmcntenset_el0); in __pmu_switch_to_guest()
157 write_sysreg(pmu->events_guest, pmcntenclr_el0); in __pmu_switch_to_host()
160 write_sysreg(pmu->events_host, pmcntenset_el0); in __pmu_switch_to_host()
H A Dtimer-sr.c16 write_sysreg(cntvoff, cntvoff_el2); in __kvm_timer_set_cntvoff()
33 write_sysreg(val, cnthctl_el2); in __timer_disable_traps()
/linux/arch/arm/mm/
H A Dpmsa-v7.c49 write_sysreg(v, RNGNR); in rgnr_write()
57 write_sysreg(v, DRACR); in dracr_write()
63 write_sysreg(v, DRSR); in drsr_write()
69 write_sysreg(v, DRBAR); in drbar_write()
81 write_sysreg(v, IRACR); in iracr_write()
87 write_sysreg(v, IRSR); in irsr_write()
93 write_sysreg(v, IRBAR); in irbar_write()
H A Dpmsa-v8.c37 write_sysreg(v, PRSEL); in prsel_write()
42 write_sysreg(v, PRBAR); in prbar_write()
47 write_sysreg(v, PRLAR); in prlar_write()
H A Dproc-v7-bugs.c48 write_sysreg(0, BPIALL); in harden_branch_predictor_bpiall()
53 write_sysreg(0, ICIALLU); in harden_branch_predictor_iciallu()
/linux/arch/arm64/kernel/
H A Dprocess.c252 write_sysreg(0, tpidr_el0); in tls_thread_flush()
265 write_sysreg(0, tpidrro_el0); in tls_thread_flush()
444 write_sysreg(next->thread.uw.tp_value, tpidrro_el0); in tls_thread_switch()
446 write_sysreg(0, tpidrro_el0); in tls_thread_switch()
448 write_sysreg(*task_user_tls(next), tpidr_el0); in tls_thread_switch()
H A Ddebug-monitors.c41 write_sysreg(mdscr, mdscr_el1); in mdscr_write()
127 write_sysreg(0, osdlr_el1); in clear_os_lock()
128 write_sysreg(0, oslar_el1); in clear_os_lock()
/linux/arch/arm64/kvm/hyp/vhe/
H A Dswitch.c136 write_sysreg(val, cpacr_el1); in __activate_cptr_traps()
167 write_sysreg(__this_cpu_read(kvm_hyp_vector), vbar_el1); in __activate_traps()
177 write_sysreg(HCR_HOST_VHE_FLAGS, hcr_el2); in __deactivate_traps()
214 write_sysreg(host_vectors, vbar_el1); in __deactivate_traps()
H A Dtimer-sr.c11 write_sysreg(cntvoff, cntvoff_el2); in __kvm_timer_set_cntvoff()

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