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Searched refs:wb_gpu_addr (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dmes_v11_0.c1113 uint64_t hqd_gpu_addr, wb_gpu_addr, eop_base_addr; in mes_v11_0_mqd_init() local
1158 wb_gpu_addr = ring->rptr_gpu_addr; in mes_v11_0_mqd_init()
1159 mqd->cp_hqd_pq_rptr_report_addr_lo = wb_gpu_addr & 0xfffffffc; in mes_v11_0_mqd_init()
1161 upper_32_bits(wb_gpu_addr) & 0xffff; in mes_v11_0_mqd_init()
1164 wb_gpu_addr = ring->wptr_gpu_addr; in mes_v11_0_mqd_init()
1165 mqd->cp_hqd_pq_wptr_poll_addr_lo = wb_gpu_addr & 0xfffffff8; in mes_v11_0_mqd_init()
1166 mqd->cp_hqd_pq_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr) & 0xffff; in mes_v11_0_mqd_init()
H A Dsdma_v7_1.c872 uint64_t wb_gpu_addr; in sdma_v7_1_mqd_init() local
883 wb_gpu_addr = prop->wptr_gpu_addr; in sdma_v7_1_mqd_init()
884 m->sdmax_rlcx_rb_wptr_poll_addr_lo = lower_32_bits(wb_gpu_addr); in sdma_v7_1_mqd_init()
885 m->sdmax_rlcx_rb_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr); in sdma_v7_1_mqd_init()
887 wb_gpu_addr = prop->rptr_gpu_addr; in sdma_v7_1_mqd_init()
888 m->sdmax_rlcx_rb_rptr_addr_lo = lower_32_bits(wb_gpu_addr); in sdma_v7_1_mqd_init()
889 m->sdmax_rlcx_rb_rptr_addr_hi = upper_32_bits(wb_gpu_addr); in sdma_v7_1_mqd_init()
H A Dsdma_v7_0.c879 uint64_t wb_gpu_addr; in sdma_v7_0_mqd_init() local
890 wb_gpu_addr = prop->wptr_gpu_addr; in sdma_v7_0_mqd_init()
891 m->sdmax_rlcx_rb_wptr_poll_addr_lo = lower_32_bits(wb_gpu_addr); in sdma_v7_0_mqd_init()
892 m->sdmax_rlcx_rb_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr); in sdma_v7_0_mqd_init()
894 wb_gpu_addr = prop->rptr_gpu_addr; in sdma_v7_0_mqd_init()
895 m->sdmax_rlcx_rb_rptr_addr_lo = lower_32_bits(wb_gpu_addr); in sdma_v7_0_mqd_init()
896 m->sdmax_rlcx_rb_rptr_addr_hi = upper_32_bits(wb_gpu_addr); in sdma_v7_0_mqd_init()
H A Dsdma_v6_0.c860 uint64_t wb_gpu_addr; in sdma_v6_0_mqd_init() local
871 wb_gpu_addr = prop->wptr_gpu_addr; in sdma_v6_0_mqd_init()
872 m->sdmax_rlcx_rb_wptr_poll_addr_lo = lower_32_bits(wb_gpu_addr); in sdma_v6_0_mqd_init()
873 m->sdmax_rlcx_rb_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr); in sdma_v6_0_mqd_init()
875 wb_gpu_addr = prop->rptr_gpu_addr; in sdma_v6_0_mqd_init()
876 m->sdmax_rlcx_rb_rptr_addr_lo = lower_32_bits(wb_gpu_addr); in sdma_v6_0_mqd_init()
877 m->sdmax_rlcx_rb_rptr_addr_hi = upper_32_bits(wb_gpu_addr); in sdma_v6_0_mqd_init()
H A Dmes_v12_0.c1273 uint64_t hqd_gpu_addr, wb_gpu_addr, eop_base_addr; in mes_v12_0_mqd_init() local
1316 wb_gpu_addr = ring->rptr_gpu_addr; in mes_v12_0_mqd_init()
1317 mqd->cp_hqd_pq_rptr_report_addr_lo = wb_gpu_addr & 0xfffffffc; in mes_v12_0_mqd_init()
1319 upper_32_bits(wb_gpu_addr) & 0xffff; in mes_v12_0_mqd_init()
1322 wb_gpu_addr = ring->wptr_gpu_addr; in mes_v12_0_mqd_init()
1323 mqd->cp_hqd_pq_wptr_poll_addr_lo = wb_gpu_addr & 0xfffffff8; in mes_v12_0_mqd_init()
1324 mqd->cp_hqd_pq_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr) & 0xffff; in mes_v12_0_mqd_init()
H A Dmes_v12_1.c1180 uint64_t hqd_gpu_addr, wb_gpu_addr, eop_base_addr; in mes_v12_1_mqd_init() local
1223 wb_gpu_addr = ring->rptr_gpu_addr; in mes_v12_1_mqd_init()
1224 mqd->cp_hqd_pq_rptr_report_addr_lo = wb_gpu_addr & 0xfffffffc; in mes_v12_1_mqd_init()
1226 upper_32_bits(wb_gpu_addr) & 0xffff; in mes_v12_1_mqd_init()
1229 wb_gpu_addr = ring->wptr_gpu_addr; in mes_v12_1_mqd_init()
1230 mqd->cp_hqd_pq_wptr_poll_addr_lo = wb_gpu_addr & 0xfffffff8; in mes_v12_1_mqd_init()
1231 mqd->cp_hqd_pq_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr) & 0xffff; in mes_v12_1_mqd_init()
H A Dgfx_v12_0.c2973 uint64_t hqd_gpu_addr, wb_gpu_addr; in gfx_v12_0_gfx_mqd_init() local
3014 wb_gpu_addr = prop->rptr_gpu_addr; in gfx_v12_0_gfx_mqd_init()
3015 mqd->cp_gfx_hqd_rptr_addr = wb_gpu_addr & 0xfffffffc; in gfx_v12_0_gfx_mqd_init()
3017 upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v12_0_gfx_mqd_init()
3020 wb_gpu_addr = prop->wptr_gpu_addr; in gfx_v12_0_gfx_mqd_init()
3021 mqd->cp_rb_wptr_poll_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v12_0_gfx_mqd_init()
3022 mqd->cp_rb_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v12_0_gfx_mqd_init()
3147 uint64_t hqd_gpu_addr, wb_gpu_addr, eop_base_addr; in gfx_v12_0_compute_mqd_init() local
3225 wb_gpu_addr = prop->rptr_gpu_addr; in gfx_v12_0_compute_mqd_init()
3226 mqd->cp_hqd_pq_rptr_report_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v12_0_compute_mqd_init()
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H A Dgfx_v11_0.c4122 uint64_t hqd_gpu_addr, wb_gpu_addr; in gfx_v11_0_gfx_mqd_init() local
4160 wb_gpu_addr = prop->rptr_gpu_addr; in gfx_v11_0_gfx_mqd_init()
4161 mqd->cp_gfx_hqd_rptr_addr = wb_gpu_addr & 0xfffffffc; in gfx_v11_0_gfx_mqd_init()
4163 upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v11_0_gfx_mqd_init()
4166 wb_gpu_addr = prop->wptr_gpu_addr; in gfx_v11_0_gfx_mqd_init()
4167 mqd->cp_rb_wptr_poll_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v11_0_gfx_mqd_init()
4168 mqd->cp_rb_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v11_0_gfx_mqd_init()
4295 uint64_t hqd_gpu_addr, wb_gpu_addr, eop_base_addr; in gfx_v11_0_compute_mqd_init() local
4374 wb_gpu_addr = prop->rptr_gpu_addr; in gfx_v11_0_compute_mqd_init()
4375 mqd->cp_hqd_pq_rptr_report_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v11_0_compute_mqd_init()
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H A Dgfx_v12_1.c2126 uint64_t hqd_gpu_addr, wb_gpu_addr, eop_base_addr; in gfx_v12_1_compute_mqd_init() local
2200 wb_gpu_addr = prop->rptr_gpu_addr; in gfx_v12_1_compute_mqd_init()
2201 mqd->cp_hqd_pq_rptr_report_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v12_1_compute_mqd_init()
2203 upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v12_1_compute_mqd_init()
2206 wb_gpu_addr = prop->wptr_gpu_addr; in gfx_v12_1_compute_mqd_init()
2207 mqd->cp_hqd_pq_wptr_poll_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v12_1_compute_mqd_init()
2208 mqd->cp_hqd_pq_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v12_1_compute_mqd_init()
H A Dgfx_v9_0.c3553 uint64_t hqd_gpu_addr, wb_gpu_addr, eop_base_addr; in gfx_v9_0_mqd_init() local
3642 wb_gpu_addr = ring->rptr_gpu_addr; in gfx_v9_0_mqd_init()
3643 mqd->cp_hqd_pq_rptr_report_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v9_0_mqd_init()
3645 upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v9_0_mqd_init()
3648 wb_gpu_addr = ring->wptr_gpu_addr; in gfx_v9_0_mqd_init()
3649 mqd->cp_hqd_pq_wptr_poll_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v9_0_mqd_init()
3650 mqd->cp_hqd_pq_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v9_0_mqd_init()