/linux/drivers/gpu/drm/amd/display/dc/optc/dcn401/ |
H A D | dcn401_optc.c | 379 void optc401_set_vtotal_min_max(struct timing_generator *optc, int vtotal_min, int vtotal_max) in optc401_set_vtotal_min_max() argument 386 vtotal_min, in optc401_set_vtotal_min_max() 393 dc_dmub_srv_drr_update_cmd(dc, optc->inst, vtotal_min, vtotal_max); in optc401_set_vtotal_min_max() 395 optc1_set_vtotal_min_max(optc, vtotal_min, vtotal_max); in optc401_set_vtotal_min_max()
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H A D | dcn401_optc.h | 169 void optc401_set_vtotal_min_max(struct timing_generator *optc, int vtotal_min, int vtotal_max);
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/linux/drivers/gpu/drm/amd/display/dc/ |
H A D | dc_dmub_srv.h | 86 void dc_dmub_srv_drr_update_cmd(struct dc *dc, uint32_t tg_inst, uint32_t vtotal_min, uint32_t vtot… 201 uint32_t vtotal_min,
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H A D | dc_dmub_srv.c | 362 void dc_dmub_srv_drr_update_cmd(struct dc *dc, uint32_t tg_inst, uint32_t vtotal_min, uint32_t vtot… in dc_dmub_srv_drr_update_cmd() argument 369 cmd.drr_update.dmub_optc_state_req.v_total_min = vtotal_min; in dc_dmub_srv_drr_update_cmd() 1745 uint32_t vtotal_min, in dc_dmub_srv_fams2_drr_update() argument 1757 cmd.fams2_drr_update.dmub_optc_state_req.v_total_min = vtotal_min; in dc_dmub_srv_fams2_drr_update()
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/linux/drivers/gpu/drm/amd/display/dc/optc/dcn30/ |
H A D | dcn30_optc.c | 302 void optc3_set_vtotal_min_max(struct timing_generator *optc, int vtotal_min, int vtotal_max) in optc3_set_vtotal_min_max() argument 307 dc_dmub_srv_drr_update_cmd(dc, optc->inst, vtotal_min, vtotal_max); in optc3_set_vtotal_min_max() 309 optc1_set_vtotal_min_max(optc, vtotal_min, vtotal_max); in optc3_set_vtotal_min_max()
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H A D | dcn30_optc.h | 358 void optc3_set_vtotal_min_max(struct timing_generator *optc, int vtotal_min, int vtotal_max);
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/linux/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
H A D | dcn30_fpu.c | 185 double vtotal_min, vtotal_max; in optc3_fpu_set_vrr_m_const() local 196 vtotal_min = dcn_bw_floor(vtotal_avg); in optc3_fpu_set_vrr_m_const() 205 ASSERT(vtotal_min >= vblank_start + 1); in optc3_fpu_set_vrr_m_const() 210 if (vtotal_min == vtotal_max) { in optc3_fpu_set_vrr_m_const() 211 REG_SET(OTG_V_TOTAL, 0, OTG_V_TOTAL, (uint32_t)vtotal_min); in optc3_fpu_set_vrr_m_const() 233 (uint32_t)vtotal_max : (uint32_t)vtotal_min); in optc3_fpu_set_vrr_m_const() 251 REG_SET(OTG_V_TOTAL, 0, OTG_V_TOTAL, (uint32_t)vtotal_min); in optc3_fpu_set_vrr_m_const() 252 optc->funcs->set_vtotal_min_max(optc, vtotal_min, vtotal_max); in optc3_fpu_set_vrr_m_const()
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/linux/drivers/gpu/drm/amd/display/dc/inc/hw/ |
H A D | optc.h | 179 void optc1_set_vtotal_min_max(struct timing_generator *optc, int vtotal_min, int vtotal_max);
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H A D | timing_generator.h | 244 void (*set_vtotal_min_max)(struct timing_generator *optc, int vtotal_min, int vtotal_max);
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/linux/drivers/gpu/drm/amd/display/dc/dml/ |
H A D | display_mode_lib.c | 244 dml_print("DML PARAMS: vtotal_min = %d\n", pipe_dest->vtotal_min); in dml_log_pipe_params()
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H A D | display_mode_structs.h | 534 unsigned int vtotal_min; member
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/linux/drivers/gpu/drm/amd/display/dc/optc/dcn10/ |
H A D | dcn10_optc.c | 960 void optc1_set_vtotal_min_max(struct timing_generator *optc, int vtotal_min, int vtotal_max) in optc1_set_vtotal_min_max() argument 968 OTG_V_TOTAL_MIN, vtotal_min); in optc1_set_vtotal_min_max()
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/linux/drivers/gpu/drm/amd/display/dc/dml2/ |
H A D | dml2_utils.c | 272 pipe_ctx->pipe_dlg_param.vtotal_min = pipe_ctx->stream->adjust.v_total_min; in populate_pipe_ctx_dlg_params_from_dml()
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/linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
H A D | dcn20_fpu.c | 1413 pipes[pipe_cnt].pipe.dest.vtotal_min = res_ctx->pipe_ctx[i].stream->adjust.v_total_min; in dcn20_populate_dml_pipes_from_context() 1578 pipes[pipe_cnt].pipe.dest.vtotal_min = v_total; in dcn20_populate_dml_pipes_from_context()
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/linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/ |
H A D | dml21_translation_helper.c | 1146 pipe_ctx->pipe_dlg_param.vtotal_min = pipe_ctx->stream->adjust.v_total_min; in dml21_populate_pipe_ctx_dlg_params()
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