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Searched refs:utm_soc_bb (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_pmo/
H A Ddml2_pmo_dcn6_stage_optimizers.c133 *blackout_us = pmo->utm_soc_bb->power_management_parameters.dram_clk_change_blackout_us; in dcn6_get_params_for_pstate_type()
138 *blackout_us = pmo->utm_soc_bb->power_management_parameters.fclk_change_blackout_us; in dcn6_get_params_for_pstate_type()
144 pmo->utm_soc_bb->power_management_parameters.g7_ppt_blackout_us, in dcn6_get_params_for_pstate_type()
145 pmo->utm_soc_bb->power_management_parameters.g7_temperature_read_blackout_us); in dcn6_get_params_for_pstate_type()
152 pmo->utm_soc_bb->power_management_parameters.g7_ppt_blackout_us, in dcn6_get_params_for_pstate_type()
153 pmo->utm_soc_bb->power_management_parameters.g7_temperature_read_blackout_us); in dcn6_get_params_for_pstate_type()
1186 …REQUIRED_RESERVED_TIME = (int)pmo->utm_soc_bb->power_management_parameters.dram_clk_change_blackou… in dml2_pmo_dcn6_stage_optimizer_uclk_pstate_test_permissibility()
1612 const struct dml2_utm_soc_bb *utm_soc_bb = stage->pmo->utm_soc_bb; in dml2_pmo_dcn6_stage_optimizer_vmin_dcfclk_init() local
1616 utm_soc_bb->vmin_limit.dcfclk_khz * utm_soc_bb->return_bus_width_bytes; in dml2_pmo_dcn6_stage_optimizer_vmin_dcfclk_init()
1624 const struct dml2_utm_soc_bb *utm_soc_bb = stage->pmo->utm_soc_bb; in dml2_pmo_dcn6_stage_optimizer_vmin_dcfclk_optimize_next() local
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/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/
H A Ddml2_core_dcn5_funcs_mode_programming.c14 const struct dml2_utm_soc_bb *utm_soc_bb = in_out_params->utm_soc_bb; in dcn5_mode_programming() local
15 const struct dml2_sop_table *sop_table = &in_out_params->utm_soc_bb->sop_table; in dcn5_mode_programming()
428 utm_soc_bb->max_outstanding_reqs, in dcn5_mode_programming()
477 utm_soc_bb->max_outstanding_reqs, in dcn5_mode_programming()
496 utm_soc_bb->writeback_base_latency_us in dcn5_mode_programming()
533 …calculate_bytes_to_fetch_required_to_hide_latency_params->latency_to_hide_us[k] = utm_soc_bb->powe… in dcn5_mode_programming()
636 utm_soc_bb->power_management_parameters.g7_ppt_blackout_us, in dcn5_mode_programming()
1075 s->mmSOCParameters.WritebackLatency = utm_soc_bb->writeback_base_latency_us; in dcn5_mode_programming()
1076 …s->mmSOCParameters.DRAMClockChangeLatency = utm_soc_bb->power_management_parameters.dram_clk_chang… in dcn5_mode_programming()
1077 …s->mmSOCParameters.FCLKChangeLatency = utm_soc_bb->power_management_parameters.fclk_change_blackou… in dcn5_mode_programming()
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H A Ddml2_core_dcn6_calcs_dchub.c683 const struct dml2_utm_soc_bb *utm_soc_bb) in dcn6_rq_dlg_get_dlg_reg() argument
704 …ref_clk_mhz > 0) ? (double)display_cfg->overrides.hw.dlg_ref_clk_mhz : utm_soc_bb->dchub_refclk_mh… in dcn6_rq_dlg_get_dlg_reg()
727 DML_LOG_VERBOSE("DML_DLG: %s: soc.refclk_mhz = %u\n", __func__, utm_soc_bb->dchub_refclk_mhz); in dcn6_rq_dlg_get_dlg_reg()
1007 …ore_internal_display_mode_lib *mode_lib, const struct dml2_utm_soc_bb *utm_soc_bb, struct dml2_dch… in dcn6_rq_dlg_get_wm_regs() argument
1009 …ref_clk_mhz > 0) ? (double)display_cfg->overrides.hw.dlg_ref_clk_mhz : utm_soc_bb->dchub_refclk_mh… in dcn6_rq_dlg_get_wm_regs()
1032 const struct dml2_utm_soc_bb *utm_soc_bb, in dcn6_get_pipe_regs() argument
1036 …_dlg_get_dlg_reg(s, &out->dlg_regs, &out->ttu_regs, display_cfg, mode_lib, pipe_index, utm_soc_bb); in dcn6_get_pipe_regs()
1636 …ore_internal_display_mode_lib *mode_lib, const struct dml2_utm_soc_bb *utm_soc_bb, struct dml2_dch… in dcn6_get_watermarks() argument
1638 dcn6_rq_dlg_get_wm_regs(display_cfg, mode_lib, utm_soc_bb, out); in dcn6_get_watermarks()
H A Ddml2_core_dcn5_calcs_dchub.c5340 …ore_internal_display_mode_lib *mode_lib, const struct dml2_utm_soc_bb *utm_soc_bb, struct dml2_dch… in dcn5_rq_dlg_get_wm_regs() argument
5342 …ref_clk_mhz > 0) ? (double)display_cfg->overrides.hw.dlg_ref_clk_mhz : utm_soc_bb->dchub_refclk_mh… in dcn5_rq_dlg_get_wm_regs()
5518 const struct dml2_utm_soc_bb *utm_soc_bb) in dcn5_rq_dlg_get_dlg_reg() argument
5538 …ref_clk_mhz > 0) ? (double)display_cfg->overrides.hw.dlg_ref_clk_mhz : utm_soc_bb->dchub_refclk_mh… in dcn5_rq_dlg_get_dlg_reg()
5561 DML_LOG_VERBOSE("DML_DLG: %s: soc.refclk_mhz = %u\n", __func__, utm_soc_bb->dchub_refclk_mhz); in dcn5_rq_dlg_get_dlg_reg()
5829 …ore_internal_display_mode_lib *mode_lib, const struct dml2_utm_soc_bb *utm_soc_bb, struct dml2_dis… in dcn5_rq_dlg_get_arb_params() argument
5831 …ref_clk_mhz > 0) ? (double)display_cfg->overrides.hw.dlg_ref_clk_mhz : utm_soc_bb->dchub_refclk_mh… in dcn5_rq_dlg_get_arb_params()
5833 arb_param->max_req_outstanding = utm_soc_bb->max_outstanding_reqs; in dcn5_rq_dlg_get_arb_params()
5834 …arb_param->min_req_outstanding = utm_soc_bb->max_outstanding_reqs; // turn off the sat level featu… in dcn5_rq_dlg_get_arb_params()
5835 …arb_param->sdpif_request_rate_limit = (3 * mode_lib->ip.words_per_channel * utm_soc_bb->dram_confi… in dcn5_rq_dlg_get_arb_params()
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H A Ddml2_core_shared_types.h2490 const struct dml2_utm_soc_bb *utm_soc_bb; member
2506 const struct dml2_utm_soc_bb *utm_soc_bb; member