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Searched refs:top_level (Results 1 – 16 of 16) sorted by relevance

/linux/drivers/iommu/generic_pt/fmt/
H A Dx86_64.h244 if (cfg->top_level < 3 || cfg->top_level > 4) in x86_64_pt_iommu_fmt_init()
247 pt_top_set_level(&table->common, cfg->top_level); in x86_64_pt_iommu_fmt_init()
262 info->levels = top_range->top_level + 1; in x86_64_pt_iommu_fmt_hw_info()
269 .common.hw_max_vasz_lg2 = 48, .top_level = 3 },
271 .common.hw_max_vasz_lg2 = 57, .top_level = 4 },
273 [2] = { .common.hw_max_vasz_lg2 = 47, .top_level = 3 },
274 [3] = { .common.hw_max_vasz_lg2 = 56, .top_level = 4},
H A Dvtdss.h252 if (cfg->top_level > 4 || cfg->top_level < 2) in vtdss_pt_iommu_fmt_init()
255 pt_top_set_level(&table->common, cfg->top_level); in vtdss_pt_iommu_fmt_init()
272 info->aw = top_range->top_level - 1; in vtdss_pt_iommu_fmt_hw_info()
278 [0] = { .common.hw_max_vasz_lg2 = 39, .top_level = 2},
279 [1] = { .common.hw_max_vasz_lg2 = 48, .top_level = 3},
280 [2] = { .common.hw_max_vasz_lg2 = 57, .top_level = 4},
H A Damdv1.h397 info->mode = top_range->top_level + 1; in amdv1pt_iommu_fmt_hw_info()
/linux/drivers/iommu/generic_pt/
H A Dpt_defs.h138 u8 top_level; member
305 unsigned int top_level) in _pt_top_set() argument
307 return top_level | (uintptr_t)table_mem; in _pt_top_set()
312 unsigned int top_level) in pt_top_set() argument
314 WRITE_ONCE(common->top_of_table, _pt_top_set(table_mem, top_level)); in pt_top_set()
318 unsigned int top_level) in pt_top_set_level() argument
320 pt_top_set(common, NULL, top_level); in pt_top_set_level()
H A Dpt_iter.h112 PT_WARN_ON(pts->level > pts->range->top_level); in pt_range_to_index()
113 if (pts->range->top_level == pts->level) in pt_range_to_index()
136 if (pts->range->top_level == pts->level) in pt_range_to_end_index()
218 .top_level = top_of_table % (1 << PT_TOP_LEVEL_BITS), in _pt_top_range()
220 struct pt_state pts = { .range = &range, .level = range.top_level }; in _pt_top_range()
368 return pt_init(range, range->top_level, range->top_table); in pt_init_top()
408 return fn(range, arg, range->top_level, range->top_table); in pt_walk_range()
500 if (range.top_level != PT_MAX_TOP_LEVEL && in pt_top_memsize_lg2()
H A Diommu_pt.h713 top_range.top_level = pts.level; in increase_top()
784 if (!ret && map->leaf_level <= range->top_level) in check_map_range()
814 if (map->leaf_level == range->top_level) in do_map()
906 PT_WARN_ON(map.leaf_level > range.top_level); in DOMAIN_NS()
1075 for (pts.level = 0; pts.level <= range.top_level; pts.level++) in NS()
1117 if (PT_WARN_ON(top_range.top_level > PT_MAX_TOP_LEVEL)) in pt_init_common()
1120 if (top_range.top_level == PT_MAX_TOP_LEVEL || in pt_init_common()
1139 top_range.top_level != PT_MAX_TOP_LEVEL) { in pt_init_common()
1141 .level = top_range.top_level }; in pt_init_common()
H A Dpt_common.h319 if (pts->range->top_level == pts->level) in pt_table_oa_lg2sz()
H A Dkunit_iommu.h92 phys_addr_t top_paddr, unsigned int top_level) in pt_kunit_change_top() argument
H A Dkunit_iommu_pt.h129 KUNIT_ASSERT_EQ(test, pt_top_range(common).top_level, in test_increase_level()
130 top_range.top_level + 1); in test_increase_level()
H A Dkunit_generic_pt.h53 pts.level == pts.range->top_level) in __check_all_levels()
420 if (pts->level == top_range.top_level) in safe_pt_num_items_lg2()
/linux/include/linux/generic_pt/
H A Diommu.h142 unsigned int top_level);
268 unsigned int top_level; member
281 unsigned int top_level; member
/linux/arch/sparc/kernel/
H A Dcpumap.c300 int top_level, level; in increment_rover() local
302 top_level = t->nodes[root_index].level; in increment_rover()
303 for (level = node->level; level >= top_level; level--) { in increment_rover()
310 if ((level == top_level) || in increment_rover()
/linux/arch/x86/kvm/mmu/
H A Dpaging_tmpl.h620 int top_level, ret; in FNAME() local
626 top_level = vcpu->arch.mmu->cpu_role.base.level; in FNAME()
627 if (top_level == PT32E_ROOT_LEVEL) in FNAME()
628 top_level = PT32_ROOT_LEVEL; in FNAME()
635 if (FNAME(gpte_changed)(vcpu, gw, top_level)) in FNAME()
/linux/drivers/iommu/intel/
H A Diommu.c2802 unsigned int *top_level) in compute_vasz_lg2_fs() argument
2814 *top_level = 4; in compute_vasz_lg2_fs()
2819 *top_level = 3; in compute_vasz_lg2_fs()
2843 compute_vasz_lg2_fs(iommu, &cfg.top_level); in intel_iommu_domain_alloc_first_stage()
2876 unsigned int *top_level) in compute_vasz_lg2_ss() argument
2888 *top_level = 4; in compute_vasz_lg2_ss()
2891 *top_level = 3 + ffs(sagaw >> 3); in compute_vasz_lg2_ss()
2894 *top_level = 2 + ffs(sagaw >> 2); in compute_vasz_lg2_ss()
2933 cfg.common.hw_max_vasz_lg2 = compute_vasz_lg2_ss(iommu, &cfg.top_level); in intel_iommu_domain_alloc_second_stage()
/linux/drivers/iommu/amd/
H A Diommu.c76 phys_addr_t top_paddr, unsigned int top_level);
79 phys_addr_t top_paddr, unsigned int top_level);
2059 phys_addr_t top_paddr, unsigned int top_level) in set_dte_entry() argument
2086 pt_info.mode = top_level + 1; in set_dte_entry()
2088 WARN_ON(top_paddr || top_level); in set_dte_entry()
2547 phys_addr_t top_paddr, unsigned int top_level) in amd_iommu_change_top() argument
2560 set_dte_entry(iommu, dev_data, top_paddr, top_level); in amd_iommu_change_top()
2748 cfg.top_level = 4; in amd_iommu_domain_alloc_paging_v2()
2751 cfg.top_level = 3; in amd_iommu_domain_alloc_paging_v2()
/linux/kernel/trace/
H A Dtrace.c9794 bool top_level = tr == &global_trace; in create_trace_options_dir() local
9802 if (top_level || in create_trace_options_dir()