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/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn60/
H A Ddcn60_clk_mgr.c828 static inline uint32_t count_to_khz(uint32_t count, uint32_t timer_ths, uint32_t refclk_khz) in dcn60_auto_dpm_test_log()
830 if (timer_ths == 0) in dcn60_auto_dpm_test_log()
833 return (uint32_t)div_u64((uint64_t)count * (uint64_t)refclk_khz, timer_ths); in dcn60_auto_dpm_test_log()
875 uint32_t timer_ths; in dcn60_auto_dpm_test_log()
879 timer_ths = internal.CLK8_CLK_TICK_CNT__TIMER_THRESHOLD; in dcn60_auto_dpm_test_log()
881 regs_and_bypass->dcfclk = count_to_khz(internal.CLK8_CLK0_CURRENT_CNT, timer_ths, refclk_khz); in dcn60_auto_dpm_test_log()
884 regs_and_bypass->dprefclk = count_to_khz(internal.CLK8_CLK3_CURRENT_CNT, timer_ths, refclk_khz); in dcn60_auto_dpm_test_log()
885 regs_and_bypass->dispclk = count_to_khz(internal.CLK8_CLK1_CURRENT_CNT, timer_ths, refclk_khz); in dcn60_auto_dpm_test_log()
886 regs_and_bypass->dppclk = count_to_khz(internal.CLK8_CLK2_CURRENT_CNT, timer_ths, refclk_khz); in dcn60_auto_dpm_test_log()
887 regs_and_bypass->dtbclk = count_to_khz(internal.CLK8_CLK4_CURRENT_CNT, timer_ths, refclk_kh in dcn60_auto_dpm_test_log()
707 count_to_khz(uint32_t count,uint32_t timer_ths,uint32_t refclk_khz) count_to_khz() argument
754 uint32_t timer_ths; dcn60_dump_clk_registers() local
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