Searched refs:splittable (Results 1 – 6 of 6) sorted by relevance
142 …8: type eth netdev eth6 flavour pcisf controller 0 pfnum 0 sfnum 88 external false splittable false222 …h netdev ens2f0npf0sf88 flavour pcisf controller 0 pfnum 0 sfnum 88 external false splittable false231 …h netdev ens2f0npf0sf88 flavour pcisf controller 0 pfnum 0 sfnum 88 external false splittable false246 auxiliary/mlx5_core.sf.4/1: type eth netdev p0sf88 flavour virtual port 0 splittable false279 …h netdev ens2f0npf0sf88 flavour pcisf controller 0 pfnum 0 sfnum 88 external false splittable false
396 pci/0002:1c:00.0/0: type eth netdev Rpf1vf0 flavour physical port 0 splittable false397 … type eth netdev Rpf1vf1 flavour pcivf controller 0 pfnum 1 vfnum 1 external false splittable false398 … type eth netdev Rpf1vf2 flavour pcivf controller 0 pfnum 1 vfnum 2 external false splittable false399 … type eth netdev Rpf1vf3 flavour pcivf controller 0 pfnum 1 vfnum 3 external false splittable false417 … type eth netdev Rpf1vf2 flavour pcivf controller 0 pfnum 1 vfnum 2 external false splittable false
350 attrs.splittable = eth_port.port_lanes > 1 && !attrs.split; in nfp_devlink_port_register()
3062 bool splittable, u32 lanes, in __mlxsw_core_port_init() argument3075 attrs.splittable = splittable; in __mlxsw_core_port_init()3112 bool splittable, u32 lanes, in mlxsw_core_port_init() argument3121 splittable, lanes, in mlxsw_core_port_init()
1468 bool splittable; in mlxsw_sp_port_create() local1493 splittable = lanes > 1 && !split; in mlxsw_sp_port_create()1496 splittable, lanes, mlxsw_sp->base_mac, in mlxsw_sp_port_create()
290 attrs->splittable = attrs->lanes ? 1 : 0; in ice_devlink_set_port_split_options()