| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn10/ |
| H A D | dcn10_init.c | 61 .set_drr = dcn10_set_drr,
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn201/ |
| H A D | dcn201_init.c | 63 .set_drr = dcn10_set_drr,
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn21/ |
| H A D | dcn21_init.c | 64 .set_drr = dcn10_set_drr,
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn20/ |
| H A D | dcn20_init.c | 64 .set_drr = dcn10_set_drr,
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| H A D | dcn20_hwseq.c | 955 if (pipe_ctx->stream_res.tg->funcs->set_drr) in dcn20_enable_stream_timing()
956 pipe_ctx->stream_res.tg->funcs->set_drr( in dcn20_enable_stream_timing()
2852 if (pipe_ctx->stream_res.tg->funcs->set_drr) in dcn20_reset_back_end_for_pipe()
2853 pipe_ctx->stream_res.tg->funcs->set_drr( in dcn20_reset_back_end_for_pipe()
|
| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn301/ |
| H A D | dcn301_init.c | 66 .set_drr = dcn10_set_drr,
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn31/ |
| H A D | dcn31_init.c | 68 .set_drr = dcn10_set_drr,
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| H A D | dcn31_hwseq.c | 541 if (pipe_ctx->stream_res.tg->funcs->set_drr) in dcn31_reset_back_end_for_pipe()
542 pipe_ctx->stream_res.tg->funcs->set_drr( in dcn31_reset_back_end_for_pipe()
|
| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn314/ |
| H A D | dcn314_init.c | 70 .set_drr = dcn10_set_drr,
|
| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn30/ |
| H A D | dcn30_init.c | 65 .set_drr = dcn10_set_drr,
|
| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn35/ |
| H A D | dcn35_init.c | 72 .set_drr = dcn35_set_drr,
|
| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn351/ |
| H A D | dcn351_init.c | 71 .set_drr = dcn35_set_drr,
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn401/ |
| H A D | dcn401_init.c | 46 .set_drr = dcn10_set_drr,
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| H A D | dcn401_hwseq.c | 834 if (pipe_ctx->stream_res.tg->funcs->set_drr) in dcn401_enable_stream_timing()
835 pipe_ctx->stream_res.tg->funcs->set_drr( in dcn401_enable_stream_timing()
1866 if (pipe_ctx->stream_res.tg->funcs->set_drr) in dcn401_reset_back_end_for_pipe()
1867 pipe_ctx->stream_res.tg->funcs->set_drr( in dcn401_reset_back_end_for_pipe()
|
| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn32/ |
| H A D | dcn32_init.c | 67 .set_drr = dcn10_set_drr,
|
| /linux/drivers/gpu/drm/amd/display/dc/optc/dcn201/ |
| H A D | dcn201_optc.c | 162 .set_drr = optc1_set_drr,
|
| /linux/drivers/gpu/drm/amd/display/dc/dce80/ |
| H A D | dce80_timing_generator.c | 212 .set_drr = dce110_timing_generator_set_drr,
|
| /linux/drivers/gpu/drm/amd/display/dc/optc/dcn314/ |
| H A D | dcn314_optc.c | 227 .set_drr = optc31_set_drr,
|
| /linux/drivers/gpu/drm/amd/display/dc/optc/dcn31/ |
| H A D | dcn31_optc.c | 279 .set_drr = optc31_set_drr,
|
| /linux/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| H A D | timing_generator.h | 246 void (*set_drr)(struct timing_generator *tg, const struct drr_params *params); member
|
| /linux/drivers/gpu/drm/amd/display/dc/hwss/dce110/ |
| H A D | dce110_hwseq.c | 1657 if (pipe_ctx->stream_res.tg->funcs->set_drr) in dce110_apply_single_controller_ctx_to_hw()
1658 pipe_ctx->stream_res.tg->funcs->set_drr( in dce110_apply_single_controller_ctx_to_hw()
2082 static void set_drr(struct pipe_ctx **pipe_ctx, in set_drr() function
2107 if (tg->funcs->set_drr) in set_drr()
2108 tg->funcs->set_drr(tg, ¶ms); in set_drr()
3350 .set_drr = set_drr,
|
| /linux/drivers/gpu/drm/amd/display/dc/optc/dcn20/ |
| H A D | dcn20_optc.c | 537 .set_drr = optc1_set_drr,
|
| /linux/drivers/gpu/drm/amd/display/dc/optc/dcn35/ |
| H A D | dcn35_optc.c | 463 .set_drr = optc35_set_drr,
|
| /linux/drivers/gpu/drm/amd/display/dc/optc/dcn401/ |
| H A D | dcn401_optc.c | 494 .set_drr = optc401_set_drr,
|
| /linux/drivers/gpu/drm/amd/display/dc/hwss/ |
| H A D | hw_sequencer.h | 273 void (*set_drr)(struct pipe_ctx **pipe_ctx, int num_pipes, member
|