Searched refs:ring_enc (Results 1 – 8 of 8) sorted by relevance
219 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v4_0_sw_init()241 amdgpu_get_soft_full_reset_mask(&adev->vcn.inst[0].ring_enc[0]); in vcn_v4_0_sw_init()333 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v4_0_hw_init()344 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v4_0_hw_init()1094 ring = &adev->vcn.inst[inst_idx].ring_enc[0]; in vcn_v4_0_start_dpg_mode()1281 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v4_0_start()1314 …4_0_init_ring_metadata(struct amdgpu_device *adev, uint32_t vcn_inst, struct amdgpu_ring *ring_enc) in vcn_v4_0_init_ring_metadata() argument1317 uint8_t *rb_ptr = (uint8_t *)ring_enc->ring; in vcn_v4_0_init_ring_metadata()1319 rb_ptr += ring_enc->ring_size; in vcn_v4_0_init_ring_metadata()1335 struct amdgpu_ring *ring_enc; in vcn_v4_0_start_sriov() local[all …]
134 amdgpu_get_soft_full_reset_mask(&adev->vcn.inst[0].ring_enc[0]); in vcn_v5_0_1_late_init()202 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v5_0_1_sw_init()296 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v5_0_1_hw_init_inst()326 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v5_0_1_hw_init()336 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v5_0_1_hw_init()767 ring = &adev->vcn.inst[inst_idx].ring_enc[0]; in vcn_v5_0_1_start_dpg_mode()802 struct amdgpu_ring *ring_enc; in vcn_v5_0_1_start_sriov() local909 ring_enc = &adev->vcn.inst[vcn_inst].ring_enc[0]; in vcn_v5_0_1_start_sriov()910 ring_enc->wptr = 0; in vcn_v5_0_1_start_sriov()911 rb_enc_addr = ring_enc->gpu_addr; in vcn_v5_0_1_start_sriov()[all …]
170 amdgpu_get_soft_full_reset_mask(&adev->vcn.inst[0].ring_enc[0]); in vcn_v4_0_3_late_init()231 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v4_0_3_sw_init()334 ring = &adev->vcn.inst[inst_idx].ring_enc[0]; in vcn_v4_0_3_hw_init_inst()371 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v4_0_3_hw_init()386 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v4_0_3_hw_init()987 ring = &adev->vcn.inst[inst_idx].ring_enc[0]; in vcn_v4_0_3_start_dpg_mode()1031 struct amdgpu_ring *ring_enc; in vcn_v4_0_3_start_sriov() local1138 ring_enc = &adev->vcn.inst[vcn_inst].ring_enc[0]; in vcn_v4_0_3_start_sriov()1139 ring_enc->wptr = 0; in vcn_v4_0_3_start_sriov()1140 rb_enc_addr = ring_enc->gpu_addr; in vcn_v4_0_3_start_sriov()[all …]
161 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v5_0_0_sw_init()189 amdgpu_get_soft_full_reset_mask(&adev->vcn.inst[0].ring_enc[0]); in vcn_v5_0_0_sw_init()262 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v5_0_0_hw_init()764 ring = &adev->vcn.inst[inst_idx].ring_enc[0]; in vcn_v5_0_0_start_dpg_mode()948 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v5_0_0_start()1166 if (ring != &adev->vcn.inst[ring->me].ring_enc[0]) in vcn_v5_0_0_unified_ring_get_rptr()1183 if (ring != &adev->vcn.inst[ring->me].ring_enc[0]) in vcn_v5_0_0_unified_ring_get_wptr()1203 if (ring != &adev->vcn.inst[ring->me].ring_enc[0]) in vcn_v5_0_0_unified_ring_set_wptr()1311 adev->vcn.inst[i].ring_enc[0].funcs = in vcn_v5_0_0_set_unified_ring_funcs()1314 adev->vcn.inst[i].ring_enc[0].funcs = in vcn_v5_0_0_set_unified_ring_funcs()[all …]
201 ring = &adev->vcn.inst->ring_enc[i]; in vcn_v2_0_sw_init()219 amdgpu_get_soft_full_reset_mask(&adev->vcn.inst[0].ring_enc[0]); in vcn_v2_0_sw_init()303 ring = &adev->vcn.inst->ring_enc[i]; in vcn_v2_0_hw_init()1155 ring = &adev->vcn.inst->ring_enc[0]; in vcn_v2_0_start()1164 ring = &adev->vcn.inst->ring_enc[1]; in vcn_v2_0_start()1327 ring = &adev->vcn.inst->ring_enc[0]; in vcn_v2_0_pause_dpg_mode()1337 ring = &adev->vcn.inst->ring_enc[1]; in vcn_v2_0_pause_dpg_mode()1654 if (ring == &adev->vcn.inst->ring_enc[0]) in vcn_v2_0_enc_ring_get_rptr()1671 if (ring == &adev->vcn.inst->ring_enc[0]) { in vcn_v2_0_enc_ring_get_wptr()1695 if (ring == &adev->vcn.inst->ring_enc[0]) { in vcn_v2_0_enc_ring_set_wptr()[all …]
259 ring = &adev->vcn.inst[i].ring_enc[j]; in vcn_v3_0_sw_init()295 amdgpu_get_soft_full_reset_mask(&adev->vcn.inst[0].ring_enc[0]); in vcn_v3_0_sw_init()394 ring = &adev->vcn.inst[i].ring_enc[j]; in vcn_v3_0_hw_init()422 ring = &adev->vcn.inst[i].ring_enc[j]; in vcn_v3_0_hw_init()1359 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v3_0_start()1368 ring = &adev->vcn.inst[i].ring_enc[1]; in vcn_v3_0_start()1495 ring = &adev->vcn.inst[i].ring_enc[j]; in vcn_v3_0_start_sriov()1754 ring = &adev->vcn.inst[inst_idx].ring_enc[0]; in vcn_v3_0_pause_dpg_mode()1764 ring = &adev->vcn.inst[inst_idx].ring_enc[1]; in vcn_v3_0_pause_dpg_mode()2087 if (ring == &adev->vcn.inst[ring->me].ring_enc[0]) in vcn_v3_0_enc_ring_get_rptr()[all …]
46 struct amdgpu_ring ring_enc[AMDGPU_MAX_UVD_ENC_RINGS]; member
394 amdgpu_ring_fini(&adev->uvd.inst[j].ring_enc[i]); in amdgpu_uvd_sw_fini()1255 fences += amdgpu_fence_count_emitted(&adev->uvd.inst[i].ring_enc[j]); in amdgpu_uvd_idle_work_handler()