Searched refs:retired (Results 1 – 16 of 16) sorted by relevance
/linux/drivers/gpu/drm/i915/selftests/ |
H A D | i915_active.c | 21 bool retired; member 59 active->retired = true; in __live_retire() 124 if (READ_ONCE(active->retired) && count) { in __live_active_setup() 158 if (!READ_ONCE(active->retired)) { in live_active_wait() 191 if (!READ_ONCE(active->retired)) { in live_active_retire() 236 if (!READ_ONCE(active->retired)) { in live_active_barrier()
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/linux/Documentation/admin-guide/hw-vuln/ |
H A D | srso.rst | 168 * PMC_0xc8 - Count of RET/RET lw retired 169 * PMC_0xc9 - Count of RET/RET lw retired mispredicted 171 and compare the number of RETs retired properly vs those retired 193 should give the same amount. I.e., every RET retired should be 210 mispredicted retired RETs vs the overall count of retired RETs during
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H A D | l1tf.rst | 53 a page fault when it is retired eventually, the pure act of loading the
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/linux/Documentation/gpu/ |
H A D | msm-crash-dump.rst | 55 retired-fence 56 The last fence retired on the ringbuffer.
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/linux/tools/perf/Documentation/ |
H A D | intel-hybrid.txt | 29 [Fixed Counter: Counts the number of instructions retired. Unit: cpu_atom] 31 [Number of instructions retired. Fixed Counter - architectural event. Unit: cpu_core]
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H A D | perf-arm-spe.txt | 159 bit 1 - instruction retired (i.e. omit speculative instructions) 165 So to sample just retired instructions:
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H A D | perf-list.txt | 95 (micro-ops retired). Both events map to IBS execution sampling (IBS op)
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H A D | perf-intel-pt.txt | 181 that instruction has retired when the cycle count is updated.
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/linux/drivers/ras/ |
H A D | Kconfig | 46 Memory will be retired during boot time and run time depending on
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/linux/Documentation/scsi/ |
H A D | megaraid.rst | 72 will be retired.
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/linux/Documentation/arch/arm64/ |
H A D | amu.rst | 32 - Instructions retired: increments with every architecturally executed
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/linux/tools/arch/x86/kcpuid/ |
H A D | cpuid.csv | 315 … 0xa, 0, ebx, 1, no_insn_retired_evt , Instruction retired event not available 319 …0xa, 0, ebx, 5, no_br_insn_ret_evt , Branch instruction retired event not av… 320 …0xa, 0, ebx, 6, no_br_mispredict_evt , Branch mispredict retired event not ava… 605 … 0x23, 3, eax, 1, insn_retired_evt , Instructions retired event supported 609 …0x23, 3, eax, 5, br_insn_ret_evt , Branch instruction retired event suppo… 610 …0x23, 3, eax, 6, br_mispr_evt , Branch mispredict retired event suppor… 793 0x80000008, 0, ebx, 1, irperf , Instruction retired counter MSR
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/linux/Documentation/filesystems/caching/ |
H A D | fscache.rst | 141 * Cookies can be "retired" upon release, thereby causing the object to be
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H A D | cachefiles.rst | 221 kernel module moves any retired or culled objects that it can't simply unlink
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/linux/arch/x86/events/intel/ |
H A D | core.c | 472 EVENT_ATTR_STR(topdown-slots-retired, td_slots_retired, 1728 EVENT_ATTR_STR(topdown-slots-retired, td_slots_retired_slm, 1881 EVENT_ATTR_STR(topdown-slots-retired, td_slots_retired_glm, "event=0xc2");
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/linux/Documentation/admin-guide/pm/ |
H A D | cpufreq.rst | 22 can be retired by the CPU over a unit of time, but also the higher the clock
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