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Searched refs:res_pool (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/bus/fsl-mc/
H A Dfsl-mc-allocator.c37 struct fsl_mc_resource_pool *res_pool; in fsl_mc_resource_pool_add_device() local
49 res_pool = &mc_bus->resource_pools[pool_type]; in fsl_mc_resource_pool_add_device()
50 if (res_pool->type != pool_type) in fsl_mc_resource_pool_add_device()
52 if (res_pool->mc_bus != mc_bus) in fsl_mc_resource_pool_add_device()
55 mutex_lock(&res_pool->mutex); in fsl_mc_resource_pool_add_device()
57 if (res_pool->max_count < 0) in fsl_mc_resource_pool_add_device()
59 if (res_pool->free_count < 0 || in fsl_mc_resource_pool_add_device()
60 res_pool->free_count > res_pool->max_count) in fsl_mc_resource_pool_add_device()
75 resource->parent_pool = res_pool; in fsl_mc_resource_pool_add_device()
77 list_add_tail(&resource->node, &res_pool->free_list); in fsl_mc_resource_pool_add_device()
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/linux/drivers/gpu/drm/amd/display/dc/
H A Ddc_edid_parser.c35 struct dmcu *dmcu = dc->res_pool->dmcu; in dc_edid_parser_send_cea()
52 struct dmcu *dmcu = dc->res_pool->dmcu; in dc_edid_parser_recv_cea_ack()
68 struct dmcu *dmcu = dc->res_pool->dmcu; in dc_edid_parser_recv_amd_vsdb()
/linux/drivers/gpu/drm/amd/display/dc/core/
H A Ddc.c267 for (i = 0; i < dc->res_pool->usb4_dpia_count; i++) { in create_links()
344 unsigned int num_usb4_dpia = dc->res_pool->res_cap->num_usb4_dpia; in create_link_encoders()
345 unsigned int num_dig_link_enc = dc->res_pool->res_cap->num_dig_link_enc; in create_link_encoders()
358 if (num_dig_link_enc > dc->res_pool->dig_link_enc_count) { in create_link_encoders()
360 struct link_encoder *link_enc = dc->res_pool->link_encoders[i]; in create_link_encoders()
362 if (!link_enc && dc->res_pool->funcs->link_enc_create_minimal) { in create_link_encoders()
363 link_enc = dc->res_pool->funcs->link_enc_create_minimal(dc->ctx, in create_link_encoders()
366 dc->res_pool->link_encoders[i] = link_enc; in create_link_encoders()
367 dc->res_pool->dig_link_enc_count++; in create_link_encoders()
388 if (!dc->res_pool) in destroy_link_encoders()
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/linux/drivers/gpu/drm/amd/display/dc/link/
H A Dlink_resource.c84 available_hpo_dp_count = dc->res_pool->hpo_dp_link_enc_count; in link_restore_res_map()
H A Dlink_detection.c204 aud_support = &link->dc->res_pool->audio_support; in link_detect_sink_signal_type()
626 struct audio_support *audio_support = &link->dc->res_pool->audio_support; in detect_dp()
956 link->dc->res_pool->funcs->link_encs_assign && in should_verify_link_capability_destructively()
1109 struct audio_support *aud_support = &link->dc->res_pool->audio_support; in detect_link_and_local_sink()
1498 if (dc_ctx->dc->res_pool->funcs->get_panel_config_defaults) in detect_link_and_local_sink()
1499 dc_ctx->dc->res_pool->funcs->get_panel_config_defaults(&link->panel_config); in detect_link_and_local_sink()
/linux/drivers/gpu/drm/amd/display/dc/dcn31/
H A Ddcn31_panel_cntl.c101 uint32_t xtal = panel_cntl->ctx->dc->res_pool->ref_clocks.dccg_ref_clock_inKhz; in dcn31_panel_cntl_hw_init()
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/
H A Ddml2_dc_resource_mgmt.c985 ctx->config.callbacks.dc->res_pool, in unmap_dc_pipes_for_stream()
992 ctx->config.callbacks.dc->res_pool, in unmap_dc_pipes_for_stream()
1014 ctx->config.callbacks.dc->res_pool, in map_dc_pipes_for_stream()
1021 ctx->config.callbacks.dc->res_pool, in map_dc_pipes_for_stream()
H A Ddml2_wrapper_fpu.c484 …dml2_calculate_rq_and_dlg_params(in_dc, context, &context->res_ctx, dml2, in_dc->res_pool->pipe_co… in dml2_validate_and_build_resource()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/
H A Ddcn35_clk_mgr.c198 for (i = 0; i < dc->res_pool->pipe_count; ++i) { in dcn35_disable_otg_wa()
264 for (i = 0; i < clk_mgr->base.ctx->dc->res_pool->pipe_count; i++) { in dcn35_update_clocks_update_dtb_dto()
302 for (i = 0; i < clk_mgr->base.ctx->dc->res_pool->pipe_count; i++) { in dcn35_update_clocks_update_dpp_dto()
330 for (i = 0; i < clk_mgr->base.ctx->dc->res_pool->pipe_count; i++) { in dcn35_update_clocks_update_dpp_dto()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/
H A Ddcn31_clk_mgr.c122 for (i = 0; i < dc->res_pool->pipe_count; ++i) { in dcn31_disable_otg_wa()
/linux/drivers/gpu/drm/amd/display/dc/resource/dce100/
H A Ddce100_resource.c877 for (i = 0; i < dc->res_pool->pipe_count; i++) { in dce100_validate_bandwidth()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/
H A Ddcn314_clk_mgr.c157 for (i = 0; i < dc->res_pool->pipe_count; ++i) { in dcn314_disable_otg_wa()