Searched refs:regTCC_CE_ERR_STATUS_HI (Results 1 – 2 of 2) sorted by relevance
2210 #define regTCC_CE_ERR_STATUS_HI … macro
4307 {{AMDGPU_RAS_REG_ENTRY(GC, 0, regTCC_CE_ERR_STATUS_LO, regTCC_CE_ERR_STATUS_HI),