Searched refs:regSDMA0_QUEUE0_MINOR_PTR_UPDATE (Results 1 – 7 of 7) sorted by relevance
| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | amdgpu_amdkfd_gfx_v11.c | 384 WREG32(sdma_rlc_reg_offset + regSDMA0_QUEUE0_MINOR_PTR_UPDATE, 1); in hqd_sdma_load_v11()
396 WREG32(sdma_rlc_reg_offset + regSDMA0_QUEUE0_MINOR_PTR_UPDATE, 0); in hqd_sdma_load_v11()
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| H A D | sdma_v7_0.c | 561 WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_MINOR_PTR_UPDATE), 1); in sdma_v7_0_gfx_resume()
590 WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_MINOR_PTR_UPDATE), 0); in sdma_v7_0_gfx_resume()
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| H A D | sdma_v6_0.c | 543 WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_MINOR_PTR_UPDATE), 1); in sdma_v6_0_gfx_resume_instance()
572 WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_MINOR_PTR_UPDATE), 0); in sdma_v6_0_gfx_resume_instance()
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| /linux/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| H A D | gc_11_5_0_offset.h | 253 #define regSDMA0_QUEUE0_MINOR_PTR_UPDATE … macro
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| H A D | gc_12_0_0_offset.h | 236 #define regSDMA0_QUEUE0_MINOR_PTR_UPDATE … macro
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| H A D | gc_11_0_3_offset.h | 254 #define regSDMA0_QUEUE0_MINOR_PTR_UPDATE … macro
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| H A D | gc_11_0_0_offset.h | 248 #define regSDMA0_QUEUE0_MINOR_PTR_UPDATE … macro
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