Searched refs:regRLC_SAFE_MODE (Results 1 – 9 of 9) sorted by relevance
| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | gfx_v9_4_3.c | 104 SOC15_REG_ENTRY_STR(GC, 0, regRLC_SAFE_MODE), 1356 WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_SAFE_MODE, data); in gfx_v9_4_3_xcc_set_safe_mode() 1360 if (!REG_GET_FIELD(RREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_SAFE_MODE), RLC_SAFE_MODE, CMD)) 1372 WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_SAFE_MODE, data); in gfx_v9_4_3_init_rlcg_reg_access_ctrl()
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| H A D | gfx_v12_1.c | 2891 WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_SAFE_MODE, data); in gfx_v12_1_cp_resume() 2896 regRLC_SAFE_MODE), RLC_SAFE_MODE, CMD)) in gfx_v12_1_cp_resume() 2906 regRLC_SAFE_MODE, RLC_SAFE_MODE__CMD_MASK); in gfx_v12_1_gfxhub_enable()
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| H A D | gfx_v12_0.c | 4040 WREG32_SOC15(GC, 0, regRLC_SAFE_MODE, data); in gfx_v12_0_set_safe_mode() 4044 if (!REG_GET_FIELD(RREG32_SOC15(GC, 0, regRLC_SAFE_MODE), in gfx_v12_0_set_safe_mode() 4054 WREG32_SOC15(GC, 0, regRLC_SAFE_MODE, RLC_SAFE_MODE__CMD_MASK); in gfx_v12_0_unset_safe_mode()
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| H A D | gfx_v11_0.c | 5486 WREG32_SOC15(GC, 0, regRLC_SAFE_MODE, data); in gfx_v11_0_update_perf_clk() 5490 if (!REG_GET_FIELD(RREG32_SOC15(GC, 0, regRLC_SAFE_MODE), in gfx_v11_0_update_sram_fgcg() 5499 WREG32_SOC15(GC, 0, regRLC_SAFE_MODE, RLC_SAFE_MODE__CMD_MASK); in gfx_v11_0_update_sram_fgcg()
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| /linux/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| H A D | gc_9_4_3_offset.h | 6398 #define regRLC_SAFE_MODE … macro
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| H A D | gc_9_4_2_offset.h | 4892 #define regRLC_SAFE_MODE … macro
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| H A D | gc_12_0_0_offset.h | 7015 #define regRLC_SAFE_MODE … macro
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| H A D | gc_11_0_3_offset.h | 11194 #define regRLC_SAFE_MODE … macro
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| H A D | gc_11_0_0_offset.h | 10574 #define regRLC_SAFE_MODE … macro
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