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Searched refs:regOTG1_OTG_VERTICAL_INTERRUPT0_CONTROL (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h8215 #define regOTG1_OTG_VERTICAL_INTERRUPT0_CONTROL … macro
H A Ddcn_3_1_5_offset.h8826 #define regOTG1_OTG_VERTICAL_INTERRUPT0_CONTROL … macro
H A Ddcn_3_5_1_offset.h6847 #define regOTG1_OTG_VERTICAL_INTERRUPT0_CONTROL … macro
H A Ddcn_3_5_0_offset.h6868 #define regOTG1_OTG_VERTICAL_INTERRUPT0_CONTROL … macro
H A Ddcn_3_1_4_offset.h8120 #define regOTG1_OTG_VERTICAL_INTERRUPT0_CONTROL … macro
H A Ddcn_3_1_2_offset.h9067 #define regOTG1_OTG_VERTICAL_INTERRUPT0_CONTROL … macro
H A Ddcn_3_2_1_offset.h8214 #define regOTG1_OTG_VERTICAL_INTERRUPT0_CONTROL … macro
H A Ddcn_3_1_6_offset.h9291 #define regOTG1_OTG_VERTICAL_INTERRUPT0_CONTROL … macro
H A Ddcn_4_1_0_offset.h8871 #define regOTG1_OTG_VERTICAL_INTERRUPT0_CONTROL … macro