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Searched refs:regOTG1_OTG_INTERRUPT_CONTROL (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h8205 #define regOTG1_OTG_INTERRUPT_CONTROL macro
H A Ddcn_3_5_1_offset.h6837 #define regOTG1_OTG_INTERRUPT_CONTROL macro
H A Ddcn_3_5_0_offset.h6858 #define regOTG1_OTG_INTERRUPT_CONTROL macro
H A Ddcn_3_1_4_offset.h8110 #define regOTG1_OTG_INTERRUPT_CONTROL macro
H A Ddcn_3_1_2_offset.h9057 #define regOTG1_OTG_INTERRUPT_CONTROL macro
H A Ddcn_3_2_1_offset.h8204 #define regOTG1_OTG_INTERRUPT_CONTROL macro
H A Ddcn_3_1_6_offset.h9281 #define regOTG1_OTG_INTERRUPT_CONTROL macro
H A Ddcn_4_1_0_offset.h8861 #define regOTG1_OTG_INTERRUPT_CONTROL macro