Home
last modified time | relevance | path

Searched refs:regOTG0_OTG_MASTER_UPDATE_LOCK_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h8070 #define regOTG0_OTG_MASTER_UPDATE_LOCK_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h8683 #define regOTG0_OTG_MASTER_UPDATE_LOCK_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h6696 #define regOTG0_OTG_MASTER_UPDATE_LOCK_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h6717 #define regOTG0_OTG_MASTER_UPDATE_LOCK_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h7975 #define regOTG0_OTG_MASTER_UPDATE_LOCK_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h8922 #define regOTG0_OTG_MASTER_UPDATE_LOCK_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h8069 #define regOTG0_OTG_MASTER_UPDATE_LOCK_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h9146 #define regOTG0_OTG_MASTER_UPDATE_LOCK_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h8716 #define regOTG0_OTG_MASTER_UPDATE_LOCK_BASE_IDX … macro