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Searched refs:regOTG0_OTG_INTERRUPT_CONTROL_BASE_IDX (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h7994 #define regOTG0_OTG_INTERRUPT_CONTROL_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h6604 #define regOTG0_OTG_INTERRUPT_CONTROL_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h6625 #define regOTG0_OTG_INTERRUPT_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h7899 #define regOTG0_OTG_INTERRUPT_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h8844 #define regOTG0_OTG_INTERRUPT_CONTROL_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h7993 #define regOTG0_OTG_INTERRUPT_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h9068 #define regOTG0_OTG_INTERRUPT_CONTROL_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h8624 #define regOTG0_OTG_INTERRUPT_CONTROL_BASE_IDX … macro