Home
last modified time | relevance | path

Searched refs:regOTG0_OTG_CONTROL_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h7952 #define regOTG0_OTG_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h8565 #define regOTG0_OTG_CONTROL_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h6558 #define regOTG0_OTG_CONTROL_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h6579 #define regOTG0_OTG_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h7857 #define regOTG0_OTG_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h8802 #define regOTG0_OTG_CONTROL_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h7951 #define regOTG0_OTG_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h9026 #define regOTG0_OTG_CONTROL_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h8578 #define regOTG0_OTG_CONTROL_BASE_IDX … macro