Home
last modified time | relevance | path

Searched refs:regODM3_OPTC_WIDTH_CONTROL_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h7896 #define regODM3_OPTC_WIDTH_CONTROL_BASE_IDX macro
H A Ddcn_3_1_5_offset.h8509 #define regODM3_OPTC_WIDTH_CONTROL_BASE_IDX macro
H A Ddcn_3_5_1_offset.h6500 #define regODM3_OPTC_WIDTH_CONTROL_BASE_IDX macro
H A Ddcn_3_5_0_offset.h6521 #define regODM3_OPTC_WIDTH_CONTROL_BASE_IDX macro
H A Ddcn_3_1_4_offset.h7801 #define regODM3_OPTC_WIDTH_CONTROL_BASE_IDX macro
H A Ddcn_3_1_2_offset.h8746 #define regODM3_OPTC_WIDTH_CONTROL_BASE_IDX macro
H A Ddcn_3_2_1_offset.h7895 #define regODM3_OPTC_WIDTH_CONTROL_BASE_IDX macro
H A Ddcn_3_1_6_offset.h8970 #define regODM3_OPTC_WIDTH_CONTROL_BASE_IDX macro
H A Ddcn_4_1_0_offset.h8516 #define regODM3_OPTC_WIDTH_CONTROL_BASE_IDX macro