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Searched refs:regMPC_OUT1_CSC_C33_C34_A_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h6902 #define regMPC_OUT1_CSC_C33_C34_A_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h7231 #define regMPC_OUT1_CSC_C33_C34_A_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h13124 #define regMPC_OUT1_CSC_C33_C34_A_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h13145 #define regMPC_OUT1_CSC_C33_C34_A_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h14211 #define regMPC_OUT1_CSC_C33_C34_A_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h7472 #define regMPC_OUT1_CSC_C33_C34_A_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h6901 #define regMPC_OUT1_CSC_C33_C34_A_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h7692 #define regMPC_OUT1_CSC_C33_C34_A_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h7681 #define regMPC_OUT1_CSC_C33_C34_A_BASE_IDX … macro