Home
last modified time | relevance | path

Searched refs:regMPCC_OGAM1_MPCC_OGAM_RAMA_OFFSET_R (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h5203 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_OFFSET_R macro
H A Ddcn_3_1_5_offset.h6660 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_OFFSET_R macro
H A Ddcn_3_5_1_offset.h12481 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_OFFSET_R macro
H A Ddcn_3_5_0_offset.h12502 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_OFFSET_R macro
H A Ddcn_3_1_4_offset.h13568 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_OFFSET_R macro
H A Ddcn_3_1_2_offset.h6901 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_OFFSET_R macro
H A Ddcn_3_2_1_offset.h5202 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_OFFSET_R macro
H A Ddcn_3_1_6_offset.h7121 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_OFFSET_R macro
H A Ddcn_4_1_0_offset.h5742 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_OFFSET_R macro