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Searched refs:regFMT2_FMT_BIT_DEPTH_CONTROL_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h7662 #define regFMT2_FMT_BIT_DEPTH_CONTROL_BASE_IDX macro
H A Ddcn_3_1_5_offset.h8259 #define regFMT2_FMT_BIT_DEPTH_CONTROL_BASE_IDX macro
H A Ddcn_3_5_1_offset.h6224 #define regFMT2_FMT_BIT_DEPTH_CONTROL_BASE_IDX macro
H A Ddcn_3_5_0_offset.h6245 #define regFMT2_FMT_BIT_DEPTH_CONTROL_BASE_IDX macro
H A Ddcn_3_1_4_offset.h7525 #define regFMT2_FMT_BIT_DEPTH_CONTROL_BASE_IDX macro
H A Ddcn_3_1_2_offset.h8496 #define regFMT2_FMT_BIT_DEPTH_CONTROL_BASE_IDX macro
H A Ddcn_3_2_1_offset.h7661 #define regFMT2_FMT_BIT_DEPTH_CONTROL_BASE_IDX macro
H A Ddcn_3_1_6_offset.h8720 #define regFMT2_FMT_BIT_DEPTH_CONTROL_BASE_IDX macro
H A Ddcn_4_1_0_offset.h8276 #define regFMT2_FMT_BIT_DEPTH_CONTROL_BASE_IDX macro