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Searched refs:regDWB_OGAM_RAMB_START_BASE_CNTL_G_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h873 #define regDWB_OGAM_RAMB_START_BASE_CNTL_G_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h969 #define regDWB_OGAM_RAMB_START_BASE_CNTL_G_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h11174 #define regDWB_OGAM_RAMB_START_BASE_CNTL_G_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h11195 #define regDWB_OGAM_RAMB_START_BASE_CNTL_G_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h12299 #define regDWB_OGAM_RAMB_START_BASE_CNTL_G_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h1266 #define regDWB_OGAM_RAMB_START_BASE_CNTL_G_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h873 #define regDWB_OGAM_RAMB_START_BASE_CNTL_G_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h1470 #define regDWB_OGAM_RAMB_START_BASE_CNTL_G_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h1002 #define regDWB_OGAM_RAMB_START_BASE_CNTL_G_BASE_IDX … macro