Home
last modified time | relevance | path

Searched refs:regDWB_OGAM_RAMA_END_CNTL1_G (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h814 #define regDWB_OGAM_RAMA_END_CNTL1_G … macro
H A Ddcn_3_1_5_offset.h910 #define regDWB_OGAM_RAMA_END_CNTL1_G … macro
H A Ddcn_3_5_1_offset.h11115 #define regDWB_OGAM_RAMA_END_CNTL1_G … macro
H A Ddcn_3_5_0_offset.h11136 #define regDWB_OGAM_RAMA_END_CNTL1_G … macro
H A Ddcn_3_1_4_offset.h12240 #define regDWB_OGAM_RAMA_END_CNTL1_G … macro
H A Ddcn_3_1_2_offset.h1207 #define regDWB_OGAM_RAMA_END_CNTL1_G … macro
H A Ddcn_3_2_1_offset.h814 #define regDWB_OGAM_RAMA_END_CNTL1_G … macro
H A Ddcn_3_1_6_offset.h1411 #define regDWB_OGAM_RAMA_END_CNTL1_G … macro
H A Ddcn_4_1_0_offset.h943 #define regDWB_OGAM_RAMA_END_CNTL1_G … macro