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Searched refs:regDSC_TOP0_DSC_TOP_CONTROL (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h11825 #define regDSC_TOP0_DSC_TOP_CONTROL macro
H A Ddcn_3_1_5_offset.h12442 #define regDSC_TOP0_DSC_TOP_CONTROL macro
H A Ddcn_3_5_1_offset.h10462 #define regDSC_TOP0_DSC_TOP_CONTROL macro
H A Ddcn_3_5_0_offset.h10483 #define regDSC_TOP0_DSC_TOP_CONTROL macro
H A Ddcn_3_1_4_offset.h11584 #define regDSC_TOP0_DSC_TOP_CONTROL macro
H A Ddcn_3_1_2_offset.h12577 #define regDSC_TOP0_DSC_TOP_CONTROL macro
H A Ddcn_3_2_1_offset.h11828 #define regDSC_TOP0_DSC_TOP_CONTROL macro
H A Ddcn_3_1_6_offset.h13173 #define regDSC_TOP0_DSC_TOP_CONTROL macro
H A Ddcn_4_1_0_offset.h12011 #define regDSC_TOP0_DSC_TOP_CONTROL macro