Home
last modified time | relevance | path

Searched refs:regDSCL3_MPC_SIZE_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h4516 #define regDSCL3_MPC_SIZE_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h5655 #define regDSCL3_MPC_SIZE_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h5785 #define regDSCL3_MPC_SIZE_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h5806 #define regDSCL3_MPC_SIZE_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h6805 #define regDSCL3_MPC_SIZE_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h5896 #define regDSCL3_MPC_SIZE_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h4515 #define regDSCL3_MPC_SIZE_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h6116 #define regDSCL3_MPC_SIZE_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h4947 #define regDSCL3_MPC_SIZE_BASE_IDX … macro