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Searched refs:regDSCC2_DSCC_PPS_CONFIG20_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h12000 #define regDSCC2_DSCC_PPS_CONFIG20_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h12653 #define regDSCC2_DSCC_PPS_CONFIG20_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h10790 #define regDSCC2_DSCC_PPS_CONFIG20_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h10811 #define regDSCC2_DSCC_PPS_CONFIG20_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h11913 #define regDSCC2_DSCC_PPS_CONFIG20_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h12788 #define regDSCC2_DSCC_PPS_CONFIG20_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h11997 #define regDSCC2_DSCC_PPS_CONFIG20_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h13384 #define regDSCC2_DSCC_PPS_CONFIG20_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h12252 #define regDSCC2_DSCC_PPS_CONFIG20_BASE_IDX … macro