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Searched refs:regDP3_DP_SEC_CNTL5 (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h9813 #define regDP3_DP_SEC_CNTL5 … macro
H A Ddcn_3_1_5_offset.h10412 #define regDP3_DP_SEC_CNTL5 … macro
H A Ddcn_3_5_1_offset.h9332 #define regDP3_DP_SEC_CNTL5 … macro
H A Ddcn_3_5_0_offset.h9353 #define regDP3_DP_SEC_CNTL5 … macro
H A Ddcn_3_1_4_offset.h10490 #define regDP3_DP_SEC_CNTL5 … macro
H A Ddcn_3_1_2_offset.h10657 #define regDP3_DP_SEC_CNTL5 … macro
H A Ddcn_3_2_1_offset.h9812 #define regDP3_DP_SEC_CNTL5 … macro
H A Ddcn_3_1_6_offset.h10881 #define regDP3_DP_SEC_CNTL5 … macro
H A Ddcn_4_1_0_offset.h10558 #define regDP3_DP_SEC_CNTL5 … macro