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Searched refs:regDME1_DME_MEMORY_CONTROL_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h10486 #define regDME1_DME_MEMORY_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h11053 #define regDME1_DME_MEMORY_CONTROL_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h8341 #define regDME1_DME_MEMORY_CONTROL_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h8362 #define regDME1_DME_MEMORY_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h9535 #define regDME1_DME_MEMORY_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h11308 #define regDME1_DME_MEMORY_CONTROL_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h10485 #define regDME1_DME_MEMORY_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h11532 #define regDME1_DME_MEMORY_CONTROL_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h10966 #define regDME1_DME_MEMORY_CONTROL_BASE_IDX … macro