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Searched refs:regDC_GPIO_DDC5_MASK (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dpcs/
H A Ddpcs_3_1_4_offset.h6312 #define regDC_GPIO_DDC5_MASK macro
H A Ddpcs_4_2_3_offset.h685 #define regDC_GPIO_DDC5_MASK macro
H A Ddpcs_4_2_2_offset.h649 #define regDC_GPIO_DDC5_MASK macro
H A Ddpcs_4_2_0_offset.h652 #define regDC_GPIO_DDC5_MASK macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h11011 #define regDC_GPIO_DDC5_MASK macro
H A Ddcn_3_1_5_offset.h11606 #define regDC_GPIO_DDC5_MASK macro
H A Ddcn_3_5_1_offset.h9838 #define regDC_GPIO_DDC5_MASK macro
H A Ddcn_3_5_0_offset.h9859 #define regDC_GPIO_DDC5_MASK macro
H A Ddcn_3_1_4_offset.h10970 #define regDC_GPIO_DDC5_MASK macro
H A Ddcn_3_1_2_offset.h11861 #define regDC_GPIO_DDC5_MASK macro
H A Ddcn_3_2_1_offset.h11020 #define regDC_GPIO_DDC5_MASK macro
H A Ddcn_3_1_6_offset.h12097 #define regDC_GPIO_DDC5_MASK macro
H A Ddcn_4_1_0_offset.h11275 #define regDC_GPIO_DDC5_MASK macro