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Searched refs:regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED54 (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dpcs/
H A Ddpcs_3_1_4_offset.h6582 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED54 macro
H A Ddpcs_4_2_3_offset.h859 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED54 macro
H A Ddpcs_4_2_2_offset.h823 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED54 macro
H A Ddpcs_4_2_0_offset.h826 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED54 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h11309 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED54 macro
H A Ddcn_3_1_5_offset.h11900 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED54 macro
H A Ddcn_3_5_1_offset.h10022 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED54 macro
H A Ddcn_3_5_0_offset.h10043 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED54 macro
H A Ddcn_3_1_4_offset.h11144 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED54 macro
H A Ddcn_3_1_2_offset.h12035 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED54 macro
H A Ddcn_3_2_1_offset.h11318 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED54 macro
H A Ddcn_3_1_6_offset.h12391 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED54 macro
H A Ddcn_4_1_0_offset.h11593 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED54 macro